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Searched refs:CP_HQD_IB_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/radeon/
H A Dcikd.h1534 #define CP_HQD_IB_CONTROL 0xC968u macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c4529 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3); in gfx_v8_0_mqd_init()
4530 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MTYPE, 3); in gfx_v8_0_mqd_init()
H A Dgfx_v9_4_3.c1892 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3); in gfx_v9_4_3_xcc_mqd_init()
H A Dgfx_v12_0.c3136 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3); in gfx_v12_0_compute_mqd_init()
H A Dgfx_v11_0.c4250 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3); in gfx_v11_0_compute_mqd_init()
H A Dgfx_v9_0.c3637 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3); in gfx_v9_0_mqd_init()
H A Dgfx_v10_0.c6972 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3); in gfx_v10_0_compute_mqd_init()