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Searched refs:CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13045 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_9_1_sh_mask.h14345 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h14210 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h16579 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h4143 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_11_5_0_sh_mask.h14278 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17584 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h13475 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h20464 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19829 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18617 #define CP_HQD_HQ_STATUS0__QUEUE_IDLE_MASK … macro