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Searched refs:CP_HQD_EOP_WPTR__EOP_AVAIL_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4129 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK 0x1fff0000 macro
H A Dgfx_8_1_sh_mask.h4651 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK 0x1fff0000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13118 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_9_1_sh_mask.h14418 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_9_2_1_sh_mask.h14283 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_9_4_3_sh_mask.h16652 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_9_4_2_sh_mask.h4216 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_11_5_0_sh_mask.h14355 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_11_0_0_sh_mask.h17661 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_12_0_0_sh_mask.h13544 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_10_1_0_sh_mask.h20541 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_11_0_3_sh_mask.h19906 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro
H A Dgc_10_3_0_sh_mask.h18694 #define CP_HQD_EOP_WPTR__EOP_AVAIL_MASK … macro