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Searched refs:CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4120 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT 0x1f macro
H A Dgfx_8_1_sh_mask.h4642 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT 0x1f macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13089 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_9_1_sh_mask.h14389 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14254 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16623 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4187 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h14325 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17631 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20511 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19876 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18664 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM__SHIFT … macro