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Searched refs:CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4146 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h4668 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT 0x2 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13136 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_9_1_sh_mask.h14436 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14301 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16670 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4234 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h14373 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17679 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h13562 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20559 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19924 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18712 #define CP_HQD_CNTL_STACK_OFFSET__OFFSET__SHIFT … macro