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Searched refs:CP_HQD_AQL_CONTROL__CONTROL0__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v12.c145 1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT; in init_mqd()
H A Dkfd_mqd_manager_v10.c128 1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT; in init_mqd()
H A Dkfd_mqd_manager_v11.c182 1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT; in init_mqd()
H A Dkfd_mqd_manager_v9.c205 1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT; in init_mqd()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13191 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_9_1_sh_mask.h14491 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14354 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16725 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4289 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h14428 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17734 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h13615 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20614 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19979 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18767 #define CP_HQD_AQL_CONTROL__CONTROL0__SHIFT … macro