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Searched refs:CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2061 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK 0x4000000 macro
H A Dgfx_8_0_sh_mask.h2593 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK 0x4000000 macro
H A Dgfx_8_1_sh_mask.h3115 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK 0x4000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h662 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h561 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h550 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_9_4_3_sh_mask.h591 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1180 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_11_5_0_sh_mask.h3193 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6037 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_12_0_0_sh_mask.h6473 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6096 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_11_0_3_sh_mask.h6812 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro
H A Dgc_10_3_0_sh_mask.h6349 #define CP_CPC_BUSY_STAT__MEC2_PIPE0_BUSY_MASK … macro