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Searched refs:CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2038 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 0xc macro
H A Dgfx_8_0_sh_mask.h2570 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 0xc macro
H A Dgfx_8_1_sh_mask.h3092 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT 0xc macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h622 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_9_1_sh_mask.h521 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h510 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h551 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1140 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h3153 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h5997 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h6436 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6056 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h6772 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h6309 #define CP_CPC_BUSY_STAT__MEC1_PIPE2_BUSY__SHIFT … macro