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Searched refs:CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2035 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK 0x800 macro
H A Dgfx_8_0_sh_mask.h2567 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK 0x800 macro
H A Dgfx_8_1_sh_mask.h3089 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK 0x800 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h649 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h548 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h537 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_9_4_3_sh_mask.h578 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1167 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_11_5_0_sh_mask.h3180 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6024 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_12_0_0_sh_mask.h6461 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6083 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_11_0_3_sh_mask.h6799 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro
H A Dgc_10_3_0_sh_mask.h6336 #define CP_CPC_BUSY_STAT__MEC1_PIPE1_BUSY_MASK … macro