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Searched refs:CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2083 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h3204 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h3818 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h4340 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT 0x0 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1320 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro
H A Dgc_9_1_sh_mask.h1219 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1186 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h1236 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1819 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6806 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7072 #define CP_CE_ROQ_IB1_STAT__CEQ_RPTR_INDIRECT1__SHIFT … macro