Searched refs:CM_BYPASS (Results 1 – 11 of 11) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| H A D | dcn401_dpp_cm.c | 109 REG_SET(CM_CONTROL, 0, CM_BYPASS, 1); in dpp401_full_bypass()
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| H A D | dcn401_dpp.h | 173 TF_SF(CM0_CM_CONTROL, CM_BYPASS, mask_sh), \
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| H A D | dcn30_dpp_cm.c | 54 REG_UPDATE(CM_CONTROL, CM_BYPASS, cm_bypass_mode); in dpp3_enable_cm_block()
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| H A D | dcn30_dpp.h | 312 TF_SF(CM0_CM_CONTROL, CM_BYPASS, mask_sh), \
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| H A D | dcn10_dpp_cm.c | 789 REG_SET(CM_CONTROL, 0, CM_BYPASS, 1); in dpp1_full_bypass()
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| H A D | dcn10_dpp.h | 1082 type CM_BYPASS; \
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
| H A D | dcn20_dpp_cm.c | 60 REG_UPDATE(CM_CONTROL, CM_BYPASS, cm_bypass_mode); in dpp2_enable_cm_block()
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| H A D | dcn20_dpp.h | 549 TF_SF(CM0_CM_CONTROL, CM_BYPASS, mask_sh), \
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| /linux-6.15/drivers/gpu/drm/amd/include/ |
| H A D | soc24_enum.h | 1203 typedef enum CM_BYPASS { enum
1206 } CM_BYPASS; typedef
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| H A D | navi10_enum.h | 857 typedef enum CM_BYPASS { enum
860 } CM_BYPASS; typedef
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| H A D | soc21_enum.h | 1052 typedef enum CM_BYPASS { enum
1055 } CM_BYPASS; typedef
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