Searched refs:CLK_UART5_PCLK (Results 1 – 3 of 3) sorted by relevance
70 #define CLK_UART5_PCLK 60 macro
559 clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART5_PCLK>;
825 static CCU_GATE(CLK_UART5_PCLK, uart5_pclk, "uart5-pclk", perisys_apb_pclk_pd, 0x204, BIT(9), 0);