Searched refs:CLK_UART0_PCLK (Results 1 – 3 of 3) sorted by relevance
65 #define CLK_UART0_PCLK 55 macro
276 clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART0_PCLK>;
820 static CCU_GATE(CLK_UART0_PCLK, uart0_pclk, "uart0-pclk", perisys_apb_pclk_pd, 0x204, BIT(14), 0);