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Searched refs:CLK_SCLK_MMC0 (Results 1 – 22 of 22) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Dexynos5410.h26 #define CLK_SCLK_MMC0 132 macro
H A Dexynos5250.h36 #define CLK_SCLK_MMC0 139 macro
H A Dexynos7-clk.h61 #define CLK_SCLK_MMC0 8 macro
H A Dexynos4.h58 #define CLK_SCLK_MMC0 145 macro
H A Dexynos5420.h33 #define CLK_SCLK_MMC0 132 macro
H A Dexynos3250.h249 #define CLK_SCLK_MMC0 241 macro
H A Dexynos5433.h560 #define CLK_SCLK_MMC0 63 macro
/linux-6.15/Documentation/devicetree/bindings/mmc/
H A Dsamsung,s3c6410-sdhci.yaml74 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
/linux-6.15/drivers/clk/samsung/
H A Dclk-exynos5410.c173 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0",
H A Dclk-exynos5250.c479 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0",
H A Dclk-exynos3250.c553 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc0_pre",
H A Dclk-exynos7.c533 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_sclk_mmc0",
H A Dclk-exynos5420.c1010 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "dout_mmc0",
H A Dclk-exynos4.c771 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", SRC_MASK_FSYS, 0,
H A Dclk-exynos5433.c2340 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "mout_sclk_mmc0_user",
/linux-6.15/arch/arm/boot/dts/samsung/
H A Dexynos5410.dtsi132 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
H A Dexynos3250.dtsi555 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
H A Dexynos4.dtsi322 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
H A Dexynos5250.dtsi555 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
H A Dexynos5420.dtsi318 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
/linux-6.15/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi581 <&clock_top1 CLK_SCLK_MMC0>;
H A Dexynos5433.dtsi1849 <&cmu_fsys CLK_SCLK_MMC0>;