Searched refs:CLK_PHASE_SEL_CH1 (Results 1 – 1 of 1) sorted by relevance
25 #define CLK_PHASE_SEL_CH1 0 macro26 #define CLK_PHASE_SEL_CH2 ((CLK_PHASE_SEL_CH1) + 4)401 u32 val = AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH1(CLK_PHASE_SEL_CH1) | in mtk_dai_dmic_hw_params()