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Searched refs:CLK_CPLL_DIV10 (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Drockchip,rk3576-cru.h28 #define CLK_CPLL_DIV10 10 macro
/linux-6.15/drivers/clk/rockchip/
H A Dclk-rk3576.c407 COMPOSITE(CLK_CPLL_DIV10, "clk_cpll_div10", gpll_cpll_p, CLK_IS_CRITICAL,
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3576.dtsi662 <&cru CLK_CPLL_DIV10>, <&cru FCLK_DDR_CM0_CORE>,