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Searched refs:CLK_CAN0 (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Dmicrochip,mpfs-clock.h28 #define CLK_CAN0 17 macro
H A Drockchip,rk3562-cru.h233 #define CLK_CAN0 221 macro
H A Drockchip,rk3528-cru.h251 #define CLK_CAN0 239 macro
H A Drockchip,rk3576-cru.h118 #define CLK_CAN0 100 macro
H A Drockchip,rk3588-cru.h117 #define CLK_CAN0 102 macro
H A Drk3568-cru.h385 #define CLK_CAN0 321 macro
/linux-6.15/Documentation/devicetree/bindings/net/can/
H A Drockchip,rk3568v2-canfd.yaml69 clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
/linux-6.15/drivers/clk/microchip/
H A Dclk-mpfs.c323 CLK_PERIPH(CLK_CAN0, "clk_periph_can0", PARENT_CLK(AHB), 14, 0),
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi308 clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
/linux-6.15/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi425 clocks = <&clkcfg CLK_CAN0>, <&clkcfg CLK_MSSPLL3>;
/linux-6.15/drivers/clk/rockchip/
H A Dclk-rk3528.c692 COMPOSITE(CLK_CAN0, "clk_can0", mux_gpll_cpll_p, 0,
H A Dclk-rk3562.c712 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_p, 0,
H A Dclk-rk3568.c1319 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_p, 0,
H A Dclk-rk3576.c571 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_24m_p, 0,
H A Dclk-rk3588.c1056 COMPOSITE(CLK_CAN0, "clk_can0", gpll_cpll_p, 0,