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Searched refs:CLKSEL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/clk/
H A Dclk-milbeaut.c17 #define CLKSEL(n) (((n) - 1) * 4 + M10V_CLKSEL1) macro
254 {"emmc", M10V_PLL11, CLKSEL(1), 28, 3, emmcclk_table, 0,
256 {"mclk400", M10V_PLL1DIV2, CLKSEL(10), 7, 3, mclk400_table, 0, -1},
265 {"uhs1clk0", M10V_PLL7, CLKSEL(1), 3, 5, uhs1clk0_table, 0, -1},
271 CLKSEL(8), 3, 7, spi_mux_table, 0, M10V_SPICLK_ID},
273 CLKSEL(1), 13, 31, uhs1clk2_mux_table, 0, M10V_UHS1CLK2_ID},
275 CLKSEL(1), 8, 31, uhs1clk1_mux_table, 0, -1},
277 CLKSEL(1), 22, 127, nfclk_mux_table, 0, M10V_NFCLK_ID},
509 if ((factors->offset == CLKSEL(9)) || (factors->offset == CLKSEL(10))) in m10v_reg_div_pre()
510 write_valid_reg = base + CLKSEL(11); in m10v_reg_div_pre()
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/linux-6.15/Documentation/devicetree/bindings/clock/ti/
H A Dti,clksel.yaml13 The TI CLKSEL clocks consist of consist of input clock mux bits, and in some
22 description: The CLKSEL register range
34 description: The CLKSEL register and bit offset
/linux-6.15/drivers/mmc/host/
H A Ddw_mmc-exynos.c101 return SDMMC_CLKSEL_GET_DIV(mci_readl(host, CLKSEL)) + 1; in dw_mci_exynos_get_ciu_div()
168 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_set_clksel_timing()
179 mci_writel(host, CLKSEL, clksel); in dw_mci_exynos_set_clksel_timing()
251 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_resume_noirq()
261 mci_writel(host, CLKSEL, clksel); in dw_mci_exynos_resume_noirq()
442 return SDMMC_CLKSEL_CCLK_SAMPLE(mci_readl(host, CLKSEL)); in dw_mci_exynos_get_clksmpl()
457 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_set_clksmpl()
466 mci_writel(host, CLKSEL, clksel); in dw_mci_exynos_set_clksmpl()
482 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_move_next_clksmpl()
494 mci_writel(host, CLKSEL, clksel); in dw_mci_exynos_move_next_clksmpl()
/linux-6.15/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7191.yaml35 Must be present when CLKSEL pin is tied HIGH to select external clock
37 CMOS-compatible clock driving MCLK2 pin). Must be absent when CLKSEL pin
H A Dti,ads131e08.yaml36 Note: clock source is selected using CLKSEL pin.
/linux-6.15/Documentation/iio/
H A Dad7191.rst66 - When CLKSEL pin is tied LOW: Uses internal 4.92MHz clock (no clock property
68 - When CLKSEL pin is tied HIGH: Requires external clock source