Searched refs:CLEAR_XTENSA2HOST_INTR (Results 1 – 1 of 1) sorted by relevance
20 #define CLEAR_XTENSA2HOST_INTR BIT(0) macro158 writel(CLEAR_XTENSA2HOST_INTR, core->reg_base + CPU_CS_A2HSOFTINTCLR); in iris_vpu_clear_interrupt()