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Searched refs:CHL_INT0_SL_PHY_ENABLE_MSK (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/scsi/hisi_sas/
H A Dhisi_sas_v2_hw.c229 #define CHL_INT0_SL_PHY_ENABLE_MSK (0x1 << CHL_INT0_SL_PHY_ENABLE_OFF) macro
2714 CHL_INT0_SL_PHY_ENABLE_MSK); in phy_up_v2_hw()
2779 CHL_INT0_SL_PHY_ENABLE_MSK)) { in int_phy_updown_v2_hw()
2781 case CHL_INT0_SL_PHY_ENABLE_MSK: in int_phy_updown_v2_hw()
2796 CHL_INT0_SL_PHY_ENABLE_MSK): in int_phy_updown_v2_hw()
2931 & (~CHL_INT0_SL_PHY_ENABLE_MSK) in int_chnl_int_v2_hw()
H A Dhisi_sas_v3_hw.c259 #define CHL_INT0_SL_PHY_ENABLE_MSK (0x1 << CHL_INT0_SL_PHY_ENABLE_OFF) macro
1642 CHL_INT0_SL_PHY_ENABLE_MSK); in phy_up_v3_hw()
1711 if (irq_value & CHL_INT0_SL_PHY_ENABLE_MSK) in int_phy_up_down_bcast_v3_hw()
1917 & (~CHL_INT0_SL_PHY_ENABLE_MSK) in handle_chl_int0_v3_hw()