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Searched refs:CACHELINE_ALIGNED_DATA (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/arch/mips/kernel/
H A Dvmlinux.lds.S97 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
/linux-6.15/arch/x86/kernel/
H A Dvmlinux.lds.S193 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
/linux-6.15/arch/powerpc/kernel/
H A Dvmlinux.lds.S374 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
/linux-6.15/include/asm-generic/
H A Dvmlinux.lds.h403 #define CACHELINE_ALIGNED_DATA(align) \ macro
1124 CACHELINE_ALIGNED_DATA(cacheline) \