Searched refs:C20_REF_CLK_MPLLB_DIV_MASK (Results 1 – 2 of 2) sorted by relevance
352 #define C20_REF_CLK_MPLLB_DIV_MASK REG_GENMASK(12, 10) macro
2392 ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mpllb[6]); in intel_c20pll_calc_port_clock()2402 ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mplla[6]); in intel_c20pll_calc_port_clock()