Searched refs:C10_PLL14_FRACN_REM_H_MASK (Results 1 – 2 of 2) sorted by relevance
351 pll_state->pll[14] = REG_FIELD_PREP(C10_PLL14_FRACN_REM_H_MASK, pll_params.fracn_rem >> 8); in intel_snps_hdmi_pll_compute_c10pll()
238 #define C10_PLL14_FRACN_REM_H_MASK REG_GENMASK8(7, 0) macro