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/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dlpc1850-cgu.txt46 1 BASE_USB0_CLK Base clock for USB0
49 3 BASE_USB1_CLK Base clock for USB1
52 5 BASE_SPIFI_CLK Base clock for SPIFI
53 6 BASE_SPI_CLK Base clock for SPI
58 11 BASE_LCD_CLK Base clock for LCD
59 12 BASE_ADCHS_CLK Base clock for ADCHS
60 13 BASE_SDIO_CLK Base clock for SD/MMC
61 14 BASE_SSP0_CLK Base clock for SSP0
62 15 BASE_SSP1_CLK Base clock for SSP1
63 16 BASE_UART0_CLK Base clock for UART0
[all …]
H A Darmada3700-tbg-clock.txt1 * Time Base Generator Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs provide Time Base Generator clocks which are
/linux-6.15/Documentation/hwmon/
H A Dsmsc47b397.rst40 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
170 Obtaining the HWM Base Address
173 The following is an example of how to read the HWM Base Address located in
191 OUT DX,AL ; Point to HWM Base Addr MSB
193 IN AL,DX ; Get MSB of HWM Base Addr
/linux-6.15/Documentation/ABI/testing/
H A Ddebugfs-intel-iommu13 IOMMU: dmar0 Register Base Address: 26be37000
24 IOMMU: dmar1 Register Base Address: fed90000
35 IOMMU: dmar2 Register Base Address: fed91000
131 Base: 0x10022e000 Head: 20 Tail: 20
145 Base: 0x10026e000 Head: 32 Tail: 32
191 IOMMU: dmar0 Register Base Address: 26be37000
200 IOMMU: dmar2 Register Base Address: fed91000
213 IOMMU: dmar0 Register Base Address: 26be37000
/linux-6.15/arch/arm/boot/dts/st/
H A Dspear300.dtsi35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
H A Dspear310.dtsi30 0x40000000 0x0010 /* NAND Base DATA */
31 0x40020000 0x0010 /* NAND Base ADDR */
32 0x40010000 0x0010>; /* NAND Base CMD */
H A Dspear320.dtsi37 0x50000000 0x0010 /* NAND Base DATA */
38 0x50020000 0x0010 /* NAND Base ADDR */
39 0x50010000 0x0010>; /* NAND Base CMD */
H A Dspear600.dtsi77 0xd2000000 0x0010 /* NAND Base DATA */
78 0xd2020000 0x0010 /* NAND Base ADDR */
79 0xd2010000 0x0010>; /* NAND Base CMD */
/linux-6.15/Documentation/devicetree/bindings/arm/
H A Dactions.yaml27 - caninos,labrador-base-m # Labrador Base Board M v1
32 - lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B
39 - caninos,labrador-base-m2 # Labrador Base Board M v2
/linux-6.15/arch/arm/boot/dts/actions/
H A Dowl-s500-labrador-base-m.dts3 * Caninos Labrador Base Board
13 model = "Caninos Labrador Core v2 on Labrador Base-M v1";
H A Dowl-s500-guitar-bb-rev-b.dts12 model = "LeMaker Guitar Base Board rev. B";
/linux-6.15/arch/arm/boot/dts/marvell/
H A Dkirkwood-openrd-base.dts3 * Marvell OpenRD Base Board Description
16 model = "OpenRD Base";
H A Darmada-388-clearfog-base.dts3 * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog Base A1";
/linux-6.15/Documentation/PCI/endpoint/
H A Dpci-vntb-function.rst66 +--------------------------------------------------+ Base
74 +-----------------------+--------------------------+ Base + span_offset
79 +-----------------------+--------------------------+ Base + span_offset
/linux-6.15/Documentation/networking/
H A Darcnet-hardware.rst645 Setting the I/O Base Address
886 Setting the I/O Base Address
1064 SW2: DIP-Switches for Memory Base and I/O Base addresses
1090 Switches Base
1416 Setting the I/O Base Address
1625 Setting the I/O Base Address
1888 Setting the I/O Base Address
2029 Setting the I/O Base Address
2175 Setting the I/O Base Address
2260 | Base I/O Base Addr. Station | |
[all …]
/linux-6.15/Documentation/devicetree/bindings/mtd/
H A Dfsmc-nand.txt47 0xd2000000 0x0010 /* NAND Base DATA */
48 0xd2020000 0x0010 /* NAND Base ADDR */
49 0xd2010000 0x0010>; /* NAND Base CMD */
/linux-6.15/Documentation/devicetree/bindings/watchdog/
H A Darm,sbsa-gwdt.yaml7 title: SBSA (Server Base System Architecture) Generic Watchdog
15 timer can be found in the ARM document: ARM-DEN-0029 - Server Base System
/linux-6.15/arch/arm/boot/compressed/
H A Dhead-sharpsl.S29 mov r1, #0x10000000 @ Base address of TC6393 chip
43 ldr r1, .W100ADDR @ Base address of w100 chip + regs offset
129 mov r1, #0x0c000000 @ Base address of NAND chip
/linux-6.15/Documentation/scsi/
H A Dhptiop.rst89 0x4000 Inbound List Base Address Low
90 0x4004 Inbound List Base Address High
93 0x4050 Outbound List Base Address Low
94 0x4054 Outbound List Base Address High
95 0x4058 Outbound List Copy Pointer Shadow Base Address Low
96 0x405C Outbound List Copy Pointer Shadow Base Address High
/linux-6.15/tools/testing/selftests/rcutorture/bin/
H A Dconfig_override.sh19 echo Base file $base unreadable!!!
/linux-6.15/arch/arm/
H A DKconfig-nommu14 hex '(S)DRAM Base Address' if SET_MEM_PARAM
22 hex 'FLASH Base Address' if SET_MEM_PARAM
/linux-6.15/Documentation/virt/kvm/arm/
H A Dhypercalls.rst84 | Arguments: | (uint64) | R1 | Base IPA of memory region to share |
109 | Arguments: | (uint64) | R1 | Base IPA of memory region to unshare |
135 | Arguments: | (uint64) | R1 | Base IPA of MMIO memory region |
/linux-6.15/arch/powerpc/boot/dts/fsl/
H A De500v2_power_isa.dtsi38 power-isa-b; // Base
40 power-isa-atb; // Alternate Time Base
H A De500v1_power_isa.dtsi38 power-isa-b; // Base
40 power-isa-atb; // Alternate Time Base
/linux-6.15/Documentation/networking/device_drivers/ethernet/wangxun/
H A Dtxgbe.rst4 Linux Base Driver for WangXun(R) 10 Gigabit PCI Express Adapters

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