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Searched refs:BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_sh_mask.h7092 #define BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT … macro
H A Dnbio_7_11_0_sh_mask.h24930 #define BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT … macro
H A Dnbio_4_3_0_sh_mask.h9563 #define BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT … macro
H A Dnbio_7_0_sh_mask.h906 #define BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT … macro
H A Dnbio_7_2_0_sh_mask.h35944 #define BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT … macro
H A Dnbio_7_7_0_sh_mask.h31997 #define BIF_CFG_DEV0_RC0_DEVICE_CAP__FLR_CAPABLE__SHIFT … macro