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Searched refs:BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_sh_mask.h122 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_sh_mask.h2740 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro
H A Dnbio_7_11_0_sh_mask.h5073 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro
H A Dnbio_4_3_0_sh_mask.h34677 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro
H A Dnbio_2_3_sh_mask.h21119 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro
H A Dnbio_7_2_0_sh_mask.h3326 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro
H A Dnbio_7_7_0_sh_mask.h3860 #define BIF_CFG_DEV0_EPF0_BASE_CLASS__BASE_CLASS__SHIFT … macro