Searched refs:AZX_REG_ML_LCTL (Results 1 – 4 of 4) sorted by relevance
| /linux-6.15/sound/hda/ext/ |
| H A D | hdac_ext_controller.c | 177 val = readl(hlink->ml_addr + AZX_REG_ML_LCTL); in check_hdac_link_power_active()
197 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, in snd_hdac_ext_bus_link_power_up()
210 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_ML_LCTL_SPA, 0); in snd_hdac_ext_bus_link_power_down()
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| /linux-6.15/sound/soc/sof/intel/ |
| H A D | hda-mlink.c | 509 hdaml_link_enable_interrupt(hlink->ml_addr + AZX_REG_ML_LCTL, enable); in hdac_bus_eml_enable_interrupt_unlocked()
529 hdaml_link_enable_interrupt(hlink->ml_addr + AZX_REG_ML_LCTL, enable); in hdac_bus_eml_enable_interrupt()
549 return hdaml_link_check_interrupt(hlink->ml_addr + AZX_REG_ML_LCTL); in hdac_bus_eml_check_interrupt()
709 ret = hdaml_link_init(hlink->ml_addr + AZX_REG_ML_LCTL, sublink); in hdac_bus_eml_power_up_base()
780 ret = hdaml_link_shutdown(hlink->ml_addr + AZX_REG_ML_LCTL, sublink); in hdac_bus_eml_power_down_base()
1017 hdaml_lctl_offload_enable(hlink->ml_addr + AZX_REG_ML_LCTL, enable); in hdac_bus_eml_enable_offload()
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| /linux-6.15/include/sound/ |
| H A D | hda_register.h | 277 #define AZX_REG_ML_LCTL 0x04 macro
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| /linux-6.15/sound/pci/hda/ |
| H A D | hda_intel.c | 494 val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_ml_lctl_set_power()
497 writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_ml_lctl_set_power()
501 if (((readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL)) & in intel_ml_lctl_set_power()
518 val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_init_lctl()
540 writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_init_lctl()
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