Searched refs:AZX_ML_BASE (Results 1 – 4 of 4) sorted by relevance
262 #define AZX_ML_BASE 0x40 macro
95 hlink->ml_addr = bus->mlcap + AZX_ML_BASE + in snd_hdac_ext_bus_get_ml_capabilities()
472 val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCAP); in intel_get_lctl_scf()494 val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_ml_lctl_set_power()497 writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_ml_lctl_set_power()501 if (((readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL)) & in intel_ml_lctl_set_power()518 val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_init_lctl()540 writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); in intel_init_lctl()
404 hlink->ml_addr = bus->mlcap + AZX_ML_BASE + (AZX_ML_INTERVAL * index); in hda_ml_alloc_h2link()