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Searched refs:AST_IO_VGACRI (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/ast/
H A Dast_mode.c133 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); in ast_set_vbios_color_reg()
136 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); in ast_set_vbios_color_reg()
153 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); in ast_set_vbios_mode_reg()
156 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); in ast_set_vbios_mode_reg()
386 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0); in ast_set_crtthd_reg()
387 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0); in ast_set_crtthd_reg()
389 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78); in ast_set_crtthd_reg()
390 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60); in ast_set_crtthd_reg()
392 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f); in ast_set_crtthd_reg()
393 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f); in ast_set_crtthd_reg()
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H A Dast_dp.c119 ast_set_index_reg(ast, AST_IO_VGACRI, 0xe4, vgacre4); in ast_astdp_read_edid_block()
140 vgacrd7 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd7); in ast_astdp_read_edid_block()
142 vgacrd6 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd6); in ast_astdp_read_edid_block()
152 ediddata[0] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd8); in ast_astdp_read_edid_block()
194 u8 vgacrd1 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd1); in ast_dp_launch()
206 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5, in ast_dp_launch()
215 u8 vgacre3 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xe3); in ast_dp_get_phy_sleep()
243 vgacrdc = ast_get_index_reg(ast, AST_IO_VGACRI, 0xdc); in ast_dp_link_training()
356 ast_set_index_reg(ast, AST_IO_VGACRI, 0xe0, vgacre0); in ast_astdp_encoder_helper_atomic_mode_set()
357 ast_set_index_reg(ast, AST_IO_VGACRI, 0xe1, vgacre1); in ast_astdp_encoder_helper_atomic_mode_set()
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H A Dast_ddc.c49 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0xf1, ujcrb7); in ast_ddc_algo_bit_data_setsda()
50 jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x04); in ast_ddc_algo_bit_data_setsda()
65 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0xf4, ujcrb7); in ast_ddc_algo_bit_data_setscl()
66 jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x01); in ast_ddc_algo_bit_data_setscl()
102 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x20) >> 5) & 0x01; in ast_ddc_algo_bit_data_getsda()
104 val2 = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x20) >> 5) & 0x01; in ast_ddc_algo_bit_data_getsda()
109 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x20) >> 5) & 0x01; in ast_ddc_algo_bit_data_getsda()
124 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x10) >> 4) & 0x01; in ast_ddc_algo_bit_data_getscl()
126 val2 = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x10) >> 4) & 0x01; in ast_ddc_algo_bit_data_getscl()
131 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x10) >> 4) & 0x01; in ast_ddc_algo_bit_data_getscl()
H A Dast_dp501.c39 sendack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0xff); in send_ack()
41 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0x00, sendack); in send_ack()
49 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0x00, sendack); in send_nack()
86 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, ~0x40, 0x40); in set_cmd_trigger()
91 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, ~0x40, 0x00); in clear_cmd_trigger()
118 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9a, 0x00, data); in ast_write_cmd()
138 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9a, 0x00, data); in ast_write_data()
159 tmp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd3, 0xff);
172 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9a, 0x00, 0x00);
271 ast_set_index_reg(ast, AST_IO_VGACRI, 0x99, jreg); in ast_launch_m68k()
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H A Dast_cursor.c101 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc8, addr0); in ast_set_cursor_base()
102 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc9, addr1); in ast_set_cursor_base()
103 ast_set_index_reg(ast, AST_IO_VGACRI, 0xca, addr2); in ast_set_cursor_base()
114 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc2, x_offset); in ast_set_cursor_location()
115 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc3, y_offset); in ast_set_cursor_location()
116 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc4, x0); in ast_set_cursor_location()
117 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc5, x1); in ast_set_cursor_location()
118 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc6, y0); in ast_set_cursor_location()
119 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc7, y1); in ast_set_cursor_location()
132 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xcb, mask, vgacrcb); in ast_set_cursor_enabled()
H A Dast_drv.c116 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED); in ast_enable_mmio_release()
123 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, in ast_enable_mmio()
132 __ast_write8_i(ioregs, AST_IO_VGACRI, 0x80, AST_IO_VGACR80_PASSWORD); in ast_open_key()
163 vgacrd0 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd0); in ast_detect_chip()
164 vgacrd1 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd1); in ast_detect_chip()
H A Dast_mm.c42 jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xaa, 0xff); in ast_get_vram_size()
58 jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x99, 0xff); in ast_get_vram_size()
H A Dast_main.c42 u8 vgacrd0 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd0); in __ast_2100_detect_wsxga_p()
58 vgacrd1 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd1); in __ast_2100_detect_wuxga()
150 vgacra3 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff); in ast_detect_tx_chip()
160 vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, in ast_detect_tx_chip()
H A Dast_post.c50 ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00); in ast_set_def_ext_reg()
68 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01); in ast_set_def_ext_reg()
69 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00); in ast_set_def_ext_reg()
75 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg); in ast_set_def_ext_reg()
259 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_init_dram_reg()
339 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_init_dram_reg()
361 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_post_gpu()
371 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_post_gpu()
380 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_post_gpu()
1596 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2300()
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H A Dast_reg.h31 #define AST_IO_VGACRI (0x54) macro