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Searched refs:ARCH_PERFMON_EVENTSEL_ENABLE (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/tools/testing/selftests/kvm/x86/
H A Dpmu_event_filter_test.c112 wrmsr(MSR_P6_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_guest_code()
114 wrmsr(MSR_P6_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_guest_code()
136 wrmsr(MSR_K7_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_guest_code()
138 wrmsr(MSR_K7_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_guest_code()
442 wrmsr(MSR_P6_EVNTSEL0 + 0, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
444 wrmsr(MSR_P6_EVNTSEL0 + 1, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
446 wrmsr(MSR_P6_EVNTSEL0 + 2, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
463 wrmsr(MSR_K7_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_masked_events_guest_code()
465 wrmsr(MSR_K7_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_masked_events_guest_code()
467 wrmsr(MSR_K7_EVNTSEL2, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_masked_events_guest_code()
H A Dpmu_counters_test.c275 ARCH_PERFMON_EVENTSEL_ENABLE | in guest_test_arch_event()
/linux-6.15/arch/x86/events/intel/
H A Dp6.c146 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in p6_pmu_disable_all()
156 val |= ARCH_PERFMON_EVENTSEL_ENABLE; in p6_pmu_enable_all()
H A Dknc.c183 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in knc_pmu_disable_event()
194 val |= ARCH_PERFMON_EVENTSEL_ENABLE; in knc_pmu_enable_event()
H A Dcore.c2442 ARCH_PERFMON_EVENTSEL_ENABLE); in intel_pmu_nhm_workaround()
2885 u64 enable_mask = ARCH_PERFMON_EVENTSEL_ENABLE; in intel_pmu_enable_event()
4431 event->hw.config | ARCH_PERFMON_EVENTSEL_ENABLE; in core_guest_get_msrs()
4434 arr[idx].host &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in core_guest_get_msrs()
4436 arr[idx].guest &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in core_guest_get_msrs()
4461 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in core_pmu_enable_all()
/linux-6.15/tools/testing/selftests/kvm/include/x86/
H A Dpmu.h34 #define ARCH_PERFMON_EVENTSEL_ENABLE BIT_ULL(22) macro
/linux-6.15/arch/x86/kvm/
H A Dpmu.h177 return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE; in pmc_speculative_in_use()
/linux-6.15/arch/x86/include/asm/
H A Dperf_event.h31 #define ARCH_PERFMON_EVENTSEL_ENABLE (1ULL << 22) macro
/linux-6.15/arch/x86/events/
H A Dcore.c275 if (val & ARCH_PERFMON_EVENTSEL_ENABLE) { in check_hw_exists()
697 if (!(val & ARCH_PERFMON_EVENTSEL_ENABLE)) in x86_pmu_disable_all()
699 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in x86_pmu_disable_all()
753 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in x86_pmu_enable_all()
1441 ARCH_PERFMON_EVENTSEL_ENABLE); in x86_pmu_enable_event()
/linux-6.15/arch/x86/events/amd/
H A Dcore.c21 #define AMD_MERGE_EVENT_ENABLE (AMD_MERGE_EVENT | ARCH_PERFMON_EVENTSEL_ENABLE)
781 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in amd_pmu_v2_enable_event()
H A Duncore.c127 wrmsrl(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE)); in amd_uncore_start()
/linux-6.15/arch/x86/events/zhaoxin/
H A Dcore.c347 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in zhaoxin_pmu_enable_event()