Searched refs:AMDGPU_DM_MAX_DISPLAY_INDEX (Results 1 – 3 of 3) sorted by relevance
46 struct amdgpu_dm_connector *aconnector[AMDGPU_DM_MAX_DISPLAY_INDEX];54 enum mod_hdcp_encryption_status encryption_status[AMDGPU_DM_MAX_DISPLAY_INDEX];64 unsigned int content_protection[AMDGPU_DM_MAX_DISPLAY_INDEX];66 unsigned int hdcp_content_type[AMDGPU_DM_MAX_DISPLAY_INDEX];
259 for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) { in hdcp_reset_display()306 for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) { in event_property_update()375 for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; in event_property_validate()752 AMDGPU_DM_MAX_DISPLAY_INDEX); in hdcp_create_workqueue()755 AMDGPU_DM_MAX_DISPLAY_INDEX); in hdcp_create_workqueue()
47 #define AMDGPU_DM_MAX_DISPLAY_INDEX 31 macro