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Searched refs:AIE2_RT_CFG_CLK_GATING (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/accel/amdxdna/
H A Dnpu4_regs.c66 { 1, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
67 { 2, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
68 { 3, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
69 { 4, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
H A Dnpu1_regs.c49 { 1, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
H A Daie2_pm.c21 ret = aie2_runtime_cfg(ndev, AIE2_RT_CFG_CLK_GATING, &val); in aie2_pm_set_clk_gating()
H A Daie2_pci.h112 AIE2_RT_CFG_CLK_GATING, enumerator