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/linux-6.15/Documentation/devicetree/bindings/arm/
H A Darm,scu.yaml13 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
18 - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
H A Darm,realview.yaml14 Cortex-A8, and Cortex-A9 CPUs. This included new features compared to the
43 - description: ARM RealView Platform Baseboard Explore for Cortex-A9
44 (HBI-0182 and HBI-0183) was the reference platform for the Cortex-A9
H A Dcalxeda.yaml12 Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
/linux-6.15/arch/arm/mach-zynq/
H A DKconfig3 bool "Xilinx Zynq ARM Cortex A9 Platform"
17 Support for Xilinx Zynq ARM Cortex A9 Platform
/linux-6.15/arch/arm/mach-artpec/
H A DKconfig9 bool "Axis ARTPEC-6 ARM Cortex A9 Platform"
20 Support for Axis ARTPEC-6 ARM Cortex A9 Platform
/linux-6.15/arch/arm/include/debug/
H A Dvexpress.S26 @ - the original A9 core tile (based on ARM Cortex-A9 r0p1)
/linux-6.15/arch/arm64/boot/dts/apple/
H A Ds800-0-3.dtsi3 * Apple S8000/S8003 "A9" SoC
5 * This file contains parts common to both variants of A9
166 /* Note that A9 doesn't actually have a hypervisor (EL2 is not implemented). */
175 * The A9 was made by two separate fabs on two different process
H A Ds8003.dtsi3 * Apple S8003 "A9" (TSMC) SoC
64 * The A9 was made by two separate fabs on two different process
H A Ds8000.dtsi3 * Apple S8000 "A9" (Samsung) SoC
64 * The A9 was made by two separate fabs on two different process
H A Ds800-0-3-common.dtsi5 * This file contains parts common to all Apple A9 devices.
/linux-6.15/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca9.dts6 * Cortex-A9 MPCore (V2P-CA9)
236 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
279 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
293 /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
H A Darm-realview-eb-a9mp.dts27 model = "ARM RealView EB Cortex A9 MPCore";
30 * This is the Cortex A9 MPCore tile used with the
/linux-6.15/arch/arm/mach-versatile/
H A DKconfig198 bool "Support Multicore Cortex-A9 Tile"
223 bool "Support RealView(R) Platform Baseboard Explore for Cortex-A9"
259 - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
270 bool "Enable A5 and A9 only errata work-arounds"
277 based on Cortex-A5 and Cortex-A9 processors. In order to
/linux-6.15/Documentation/arch/arm/sti/
H A Dstih407-overview.rst13 - ARM Cortex-A9 1.5 GHz dual core CPU (28nm)
H A Dstih418-overview.rst13 - ARM Cortex-A9 1.5 GHz quad core CPU (28nm)
/linux-6.15/arch/arm/mach-bcm/
H A DKconfig61 applications. The SoC features dual core Cortex A9 ARM CPUs,
229 bool "Cortex-A9 SoCS"
238 Say Y if you intend to run the kernel on a Broadcom Broadband ARM A9
241 This enables support for Broadcom BCA ARM A9 broadband chipset. Currently
/linux-6.15/Documentation/admin-guide/device-mapper/
H A Ddm-raid.rst146 A5 A6 A7 A8 A9 A9 A10 A11 A12
150 A6 A5 A9 A7 A8 A10 A9 A12 A11
164 A5 A6 A7 A8 A9 A9 A10 A11 A12
165 A6 A5 A9 A7 A8 A10 A9 A12 A11
/linux-6.15/arch/arm/mach-rockchip/
H A DKconfig23 Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
/linux-6.15/Documentation/devicetree/bindings/timer/
H A Darm,global_timer.yaml13 Cortex-A9 are often associated with a per-core Global timer.
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dst,stm32-pinctrl.yaml167 /* GPIO A9 set as alternate function 2 */
171 /* GPIO A9 set as GPIO */
175 /* GPIO A9 set as analog */
/linux-6.15/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,hr2.yaml12 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
/linux-6.15/arch/arm/mach-npcm/
H A DKconfig40 Nuvoton NPCM7xx BMC based on the Cortex A9.
/linux-6.15/arch/arm/mach-hpe/
H A DKconfig17 A9 core. It is capable of using an AXI bus to which a memory controller
/linux-6.15/Documentation/devicetree/bindings/watchdog/
H A Darm,twd-wdt.yaml13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
/linux-6.15/arch/arm/mach-tegra/
H A Dreset-handler.S156 # Tegra20 is a Cortex-A9 r1p1
172 # Tegra30 is a Cortex-A9 r2p9

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