Searched refs:A32 (Results 1 – 6 of 6) sorted by relevance
| /linux-6.15/arch/x86/boot/ |
| H A D | cpucheck.c | 62 return cpu_vendor[0] == A32('A', 'u', 't', 'h') && in is_amd() 63 cpu_vendor[1] == A32('e', 'n', 't', 'i') && in is_amd() 64 cpu_vendor[2] == A32('c', 'A', 'M', 'D'); in is_amd() 69 return cpu_vendor[0] == A32('C', 'e', 'n', 't') && in is_centaur() 70 cpu_vendor[1] == A32('a', 'u', 'r', 'H') && in is_centaur() 71 cpu_vendor[2] == A32('a', 'u', 'l', 's'); in is_centaur() 76 return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && in is_transmeta() 77 cpu_vendor[1] == A32('i', 'n', 'e', 'T') && in is_transmeta() 78 cpu_vendor[2] == A32('M', 'x', '8', '6'); in is_transmeta() 83 return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && in is_intel() [all …]
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| /linux-6.15/Documentation/devicetree/bindings/arm/ |
| H A D | arm,corstone1000.yaml | 18 Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion
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| /linux-6.15/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,gic-v3.yaml | 83 ARMv8.0 architecture such as Cortex-A32, A34, A35, A53, A57, A72 and
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| /linux-6.15/arch/arm64/boot/dts/ti/ |
| H A D | k3-j784s4-j742s2-evm-common.dtsi | 553 J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
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| H A D | k3-am69-sk.dts | 500 J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
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| /linux-6.15/arch/arm64/ |
| H A D | Kconfig | 1804 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
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