| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | BUFInstructions.td | 1369 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1), 1465 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1), 1661 (vt (Op vt:$vdata_in, v4i32:$rsrc, 0, i32:$voffset, 1664 getVregSrcForVT<vt>.ret:$vdata_in, VGPR_32:$voffset, SReg_128:$rsrc, 1669 (vt (Op vt:$vdata_in, v4i32:$rsrc, i32:$vindex, i32:$voffset, 1673 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1), 1774 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1), 1856 VGPR_32:$voffset, SReg_128:$rsrc, SCSrc_b32:$soffset, timm:$offset, 1861 i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset, 1870 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1), [all …]
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| H A D | SIInstrInfo.td | 96 SDTCisVT<3, i32>, // voffset(VGPR) 114 SDTCisVT<3, i32>, // voffset(VGPR) 132 SDTCisVT<3, i32>, // voffset(VGPR) 160 SDTCisVT<3, i32>, // voffset(VGPR) 186 SDTCisVT<4, i32>, // voffset(VGPR) 197 node:$voffset, node:$soffset, node:$offset, node:$cachepolicy, 226 SDTCisVT<5, i32>, // voffset(VGPR) 235 (ops node:$src, node:$cmp, node:$rsrc, node:$vindex, node:$voffset, 238 node:$voffset, node:$soffset, node:$offset, node:$cachepolicy, 588 (ops node:$rsrc, node:$vindex, node:$voffset, node:$soffset, node:$offset, [all …]
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| H A D | FLATInstructions.td | 1061 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), vt:$in)), 1062 (inst $saddr, $voffset, $offset, 0, $in) 1071 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset))), 1072 (inst $saddr, $voffset, $offset, 0) 1077 (node vt:$data, (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset)), 1078 (inst $voffset, getVregSrcForVT<vt>.ret:$data, $saddr, $offset) 1083 …(vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), data_vt:$data)), 1084 (inst $voffset, getVregSrcForVT<data_vt>.ret:$data, $saddr, $offset) 1089 (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), vt:$data), 1090 (inst $voffset, getVregSrcForVT<vt>.ret:$data, $saddr, $offset)
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| H A D | SIInstructions.td | 3719 let InOperandList = (ins type1:$rsrc, type2:$vindex, type2:$voffset, 3728 let InOperandList = (ins type1:$rsrc, type2:$vindex, type2:$voffset, 3748 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset, 3757 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset, 3854 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset, 3883 type2:$voffset, type2:$soffset, untyped_imm_0:$offset,
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| /freebsd-14.2/sys/vm/ |
| H A D | vnode_pager.c | 618 daddr_t voffset; in vnode_pager_addr() local 625 voffset = address % bsize; in vnode_pager_addr() 630 *rtaddress += voffset / DEV_BSIZE; in vnode_pager_addr() 634 *run -= voffset / PAGE_SIZE; in vnode_pager_addr()
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| /freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/ |
| H A D | AppleObjCTrampolineHandler.cpp | 265 uint32_t voffset = desc_extractor.GetU32(&offset); in SetUpRegion() local 267 lldb::addr_t code_addr = desc_ptr + start_offset + voffset; in SetUpRegion()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 1504 llvm_i32_ty, // voffset(VGPR) 1521 llvm_i32_ty, // voffset(VGPR) 1752 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling) 1774 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling) 1800 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling) 1823 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
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