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Searched refs:virtReg2Index (Results 1 – 25 of 26) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.h124 auto I = Register::virtReg2Index(VReg); in stackifyVReg()
130 auto I = Register::virtReg2Index(VReg); in unstackifyVReg()
135 auto I = Register::virtReg2Index(VReg); in isVRegStackified()
144 auto I = Register::virtReg2Index(VReg); in setWAReg()
149 auto I = Register::virtReg2Index(VReg); in getWAReg()
H A DWebAssemblyReplacePhysRegs.cpp96 << Register::virtReg2Index(VReg) << ")\n"; in runOnMachineFunction()
H A DWebAssemblyRegColoring.cpp315 LLVM_DEBUG(dbgs() << "Assigning vreg" << Register::virtReg2Index(LI->reg()) in runOnMachineFunction()
316 << " to vreg" << Register::virtReg2Index(New) << "\n"); in runOnMachineFunction()
H A DWebAssemblyExplicitLocals.cpp68 << Register::virtReg2Index(Reg) << '\n'; in checkFrameBase()
337 if (UseEmpty[Register::virtReg2Index(OldReg)]) { in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp121 unsigned MORegIdx = Register::virtReg2Index(MOReg); in addUsedLanesOnOperand()
150 DefinedByCopy[Register::virtReg2Index(MI.getOperand(0).getReg())]); in transferUsedLanes()
207 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in transferDefinedLanesStep()
279 unsigned RegIdx = Register::virtReg2Index(Reg); in determineInitialDefinedLanes()
436 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in isUndefInput()
509 unsigned RegIdx = Register::virtReg2Index(Reg); in modifySubRegisterOperandStatus()
H A DRegAllocFast.cpp214 return Register::virtReg2Index(VirtReg); in getSparseSetIndex()
369 return LiveVirtRegs.find(Register::virtReg2Index(VirtReg)); in findLiveVirtReg()
373 return LiveVirtRegs.find(Register::virtReg2Index(VirtReg)); in findLiveVirtReg()
468 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) { in mayLiveOut()
481 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
489 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
500 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
510 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
521 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) in mayLiveIn()
529 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveIn()
H A DRegisterScavenging.cpp417 Register::virtReg2Index(Reg) >= InitialNumVirtRegs) in scavengeFrameVirtualRegsInBlock()
437 Register::virtReg2Index(Reg) >= InitialNumVirtRegs) in scavengeFrameVirtualRegsInBlock()
H A DTargetRegisterInfo.cpp124 OS << '%' << Register::virtReg2Index(Reg); in printReg()
169 OS << '%' << Register::virtReg2Index(Unit); in printVRegOrUnit()
H A DMachineVerifier.cpp2739 unsigned Index = Register::virtReg2Index(Reg); in filterAndAdd()
2762 unsigned Index = Register::virtReg2Index(Reg); in filterAndAdd()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegister.h77 static unsigned virtReg2Index(Register Reg) { in virtReg2Index() function
99 unsigned virtRegIndex() const { return virtReg2Index(Reg); } in virtRegIndex()
H A DScheduleDAGInstrs.h62 return Register::virtReg2Index(VirtReg); in getSparseSetIndex()
H A DRegisterPressure.h281 return Register::virtReg2Index(Reg) + NumRegUnits; in getSparseIndexFromReg()
H A DTargetRegisterInfo.h1324 return Register::virtReg2Index(Reg); in operator()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastPreTileConfig.cpp140 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) in mayLiveOut()
145 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
154 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
347 MayLiveAcrossBlocks.set(Register::virtReg2Index(InTileReg)); in convertPHI()
H A DX86DomainReassignment.cpp435 if (EnclosedEdges.test(Register::virtReg2Index(Reg))) in visitRegister()
553 EnclosedEdges.set(Register::virtReg2Index(Reg)); in buildClosure()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVMCCodeEmitter.cpp81 CB, Register::virtReg2Index(Op.getReg()) + 1, llvm::endianness::little); in emitOperand()
H A DSPIRVInstPrinter.cpp302 O << '%' << (Register::virtReg2Index(Op.getReg()) + 1); in printOperand()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVDuplicatesTracker.cpp90 dbgs() << Register::virtReg2Index(D->lookup(MF)) << ", "; in buildDepsGraph()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRVVInitUndef.cpp180 DLD.getVRegInfo(Register::virtReg2Index(Reg)); in handleSubReg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StackTaggingPreRA.cpp291 << Register::virtReg2Index(UseReg) << " in " << UseI in findFirstSlotCandidate()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp170 return Register::virtReg2Index(v); in v2x()
274 unsigned RInd = Register::virtReg2Index(VR); in lookup()
1581 unsigned Idx = Register::virtReg2Index(I->first); in runOnMachineFunction()
H A DBitTracker.cpp87 OS << 'v' << Register::virtReg2Index(PV.R); in operator <<()
H A DHexagonSplitDouble.cpp267 unsigned u = Register::virtReg2Index(T); in partitionRegisters()
H A DHexagonBitSimplify.cpp179 return Register::virtReg2Index(v); in v2x()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp186 LLVM_DEBUG(dbgs() << "Adding register: " << Register::virtReg2Index(Reg) in addRegToUpdateWithLine()

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