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Searched refs:vaddr0 (Results 1 – 9 of 9) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.cpp360 int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction() local
361 AMDGPU::OpName::vaddr0); in encodeInstruction()
364 assert(vaddr0 >= 0 && srsrc > vaddr0); in encodeInstruction()
365 unsigned NumExtraAddrs = srsrc - vaddr0 - 1; in encodeInstruction()
369 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrFormats.td390 bits<8> vaddr0;
401 let Inst{39-32} = vaddr0;
417 bits<8> vaddr0;
433 let Inst{39-32} = vaddr0;
451 bits<8> vaddr0;
466 let Inst{71-64} = vaddr0;
H A DMIMGInstructions.td388 string AddrAsm = !if(!eq(num_addrs, 1), "$vaddr0", nsah.AddrAsm);
409 string AddrAsm = !if(!eq(num_addrs, 1), "$vaddr0", nsah.AddrAsm);
447 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, DMask:$dmask,
903 let InOperandList = (ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
931 let InOperandList = (ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
1135 let AsmString = opcode#" $vdata, $vaddr0, $srsrc, $ssamp$dmask$dim$unorm"
1162 let AsmString = opcode#" $vdata, $vaddr0, $srsrc, $ssamp$dmask$dim$unorm"
1420 let InOperandList = (ins AddrRC:$vaddr0, SReg_128:$srsrc, A16:$a16);
1421 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$a16";
1434 let InOperandList = (ins AddrRC:$vaddr0, SReg_128:$srsrc, A16:$a16);
[all …]
H A DGCNNSAReassign.cpp176 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in CheckNSA()
287 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::vaddr0); in runOnMachineFunction()
H A DSILoadStoreOptimizer.cpp425 !AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::vaddr0)) in getInstClass()
635 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getRegs()
783 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0) + J; in setMI()
H A DSIShrinkInstructions.cpp281 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in shrinkMIMG()
H A DSIInstrInfo.cpp467 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getMemOperandsWithOffsetWidth()
5021 AMDGPU::OpName::vaddr0); in verifyInstruction()
8606 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getInstSizeInBytes()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp778 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in getInstruction()
1037 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in convertMIMGInst()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3748 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in validateMIMGAddrSize()