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Searched refs:v2f64 (Results 1 – 25 of 89) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.td32 // Handle all vector types as either f64 or v2f64.
44 CCIfType<[v2f64], CCAssignToStack<16, 4>>
58 // Handle all vector types as either f64 or v2f64.
73 // Handle all vector types as either f64 or v2f64.
77 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
93 // Handle all vector types as either f64 or v2f64.
97 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
110 // Handle all vector types as either f64 or v2f64.
114 CCIfType<[v2f64], CCAssignToReg<[Q4, Q5]>>,
144 CCIfType<[v2f64], CCIfAlign<"16",
[all …]
H A DARMCallingConv.cpp55 if (LocVT == MVT::v2f64 && in CC_ARM_APCS_Custom_f64()
108 if (LocVT == MVT::v2f64 && in CC_ARM_AAPCS_Custom_f64()
140 if (LocVT == MVT::v2f64 && !f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State)) in RetCC_ARM_APCS_Custom_f64()
223 case MVT::v2f64: in CC_ARM_AAPCS_Custom_Aggregate()
H A DARMTargetTransformInfo.cpp636 {ISD::FP_ROUND, MVT::v2f64, 2}, in getCastInstrCost()
713 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
714 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
716 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
717 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
718 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 }, in getCastInstrCost()
719 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 }, in getCastInstrCost()
720 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
1224 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost()
1245 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td468 [(set v2f64:$XT, (any_fma v2f64:$XA, v2f64:$XB, v2f64:$XTi))]>,
500 [(set v2f64:$XT, (any_fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>,
2380 dag A0B0 = (v2f64 (XXPERMDI v2f64:$A, v2f64:$B, 0));
2381 dag A1B1 = (v2f64 (XXPERMDI v2f64:$A, v2f64:$B, 3));
2388 dag B1A1 = (v2f64 (XXPERMDI v2f64:$B, v2f64:$A, 0));
2389 dag B0A0 = (v2f64 (XXPERMDI v2f64:$B, v2f64:$A, 3));
2522 def : Pat<(PPCfnmsub v2f64:$A, v2f64:$B, v2f64:$C),
2524 def : Pat<(fneg (PPCfnmsub v2f64:$A, v2f64:$B, v2f64:$C)),
2526 def : Pat<(PPCfnmsub v2f64:$A, v2f64:$B, (fneg v2f64:$C)),
2720 def : Pat<(v2f64 (any_fmaxnum v2f64:$src1, v2f64:$src2)),
[all …]
H A DREADME_P9.txt323 int_ppc_vsx_xvcmpeqdp, v2i64, v2f64>;
430 (set v2f64:$XT, (int_ppc_vsx_xviexpdp v2f64:$XA, v2f64:$XB))
435 (set v2f64:$XT, (int_ppc_vsx_xvxexpdp v2f64:$XB))
437 (set v2f64:$XT, (int_ppc_vsx_xvxsigdp v2f64:$XB))
452 (set v2f64:$XT, (int_ppc_vsx_xvtstdcdp v2f64:$XB, i7:$DCMX))
548 [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>;
558 [(store v2f64:$XT, xoaddr:$dst)]>;
H A DPPCCallingConv.td64 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
100 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
147 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64, v1i128],
150 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64, v1i128],
190 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
249 CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64, v2i64], CCAssignToStack<16, 16>>,
266 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32, v2f64],
H A DPPCInstrP10.td1284 // Load v2f64
1287 // Store v2f64
2271 // Load / Store v2f64
2389 def : Pat<(v2f64 (insertelt v2f64:$vDi, f64:$A, i64:$rB)),
2391 def : Pat<(v2f64 (insertelt v2f64:$vDi, (f64 (load DSForm:$rA)), i64:$rB)),
2393 def : Pat<(v2f64 (insertelt v2f64:$vDi, (f64 (load PDForm:$rA)), i64:$rB)),
2395 def : Pat<(v2f64 (insertelt v2f64:$vDi, (f64 (load XForm:$rA)), i64:$rB)),
2436 def : Pat<(v2f64 (insertelt v2f64:$vDi, f64:$A, i64:$rB)),
2438 def : Pat<(v2f64 (insertelt v2f64:$vDi, (f64 (load DSForm:$rA)), i64:$rB)),
2440 def : Pat<(v2f64 (insertelt v2f64:$vDi, (f64 (load PDForm:$rA)), i64:$rB)),
[all …]
/freebsd-14.2/contrib/llvm-project/clang/lib/Headers/
H A Dlsxintrin.h1644 return (__m128d)__builtin_lsx_vfadd_d((v2f64)_1, (v2f64)_2); in __lsx_vfadd_d()
1656 return (__m128d)__builtin_lsx_vfsub_d((v2f64)_1, (v2f64)_2); in __lsx_vfsub_d()
1668 return (__m128d)__builtin_lsx_vfmul_d((v2f64)_1, (v2f64)_2); in __lsx_vfmul_d()
1680 return (__m128d)__builtin_lsx_vfdiv_d((v2f64)_1, (v2f64)_2); in __lsx_vfdiv_d()
1692 return (__m128)__builtin_lsx_vfcvt_s_d((v2f64)_1, (v2f64)_2); in __lsx_vfcvt_s_d()
1704 return (__m128d)__builtin_lsx_vfmin_d((v2f64)_1, (v2f64)_2); in __lsx_vfmin_d()
1728 return (__m128d)__builtin_lsx_vfmax_d((v2f64)_1, (v2f64)_2); in __lsx_vfmax_d()
2307 return (__m128d)__builtin_lsx_vfmadd_d((v2f64)_1, (v2f64)_2, (v2f64)_3); in __lsx_vfmadd_d()
2319 return (__m128d)__builtin_lsx_vfmsub_d((v2f64)_1, (v2f64)_2, (v2f64)_3); in __lsx_vfmsub_d()
2331 return (__m128d)__builtin_lsx_vfnmadd_d((v2f64)_1, (v2f64)_2, (v2f64)_3); in __lsx_vfnmadd_d()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLSXInstrInfo.td1559 def : Pat<(fma v2f64:$vj, v2f64:$vk, v2f64:$va),
1560 (VFMADD_D v2f64:$vj, v2f64:$vk, v2f64:$va)>;
1565 def : Pat<(fma v2f64:$vj, v2f64:$vk, (fneg v2f64:$va)),
1566 (VFMSUB_D v2f64:$vj, v2f64:$vk, v2f64:$va)>;
1571 def : Pat<(fneg (fma v2f64:$vj, v2f64:$vk, v2f64:$va)),
1572 (VFNMADD_D v2f64:$vj, v2f64:$vk, v2f64:$va)>;
1576 (VFNMADD_D v2f64:$vj, v2f64:$vk, v2f64:$va)>;
1581 def : Pat<(fneg (fma v2f64:$vj, v2f64:$vk, (fneg v2f64:$va))),
1582 (VFNMSUB_D v2f64:$vj, v2f64:$vk, v2f64:$va)>;
1585 def : Pat<(fma_nsz (fneg v2f64:$vj), v2f64:$vk, v2f64:$va),
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td28 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
127 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
323 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
353 CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>,
391 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
407 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
415 CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>,
428 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16, v8bf16],
437 CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>,
482 // Handle all vector types as either f64 or v2f64.
[all …]
H A DAArch64SchedA57.td439 // Q form - v4f32, v2f64
448 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FABD|FADD|FSUB)(v4f32|v2f64|v2i64p)")>;
453 def : InstRW<[A57Write_9cyc_3V], (instregex "^FADDP(v4f32|v2f64|v2i64)")>;
465 def : InstRW<[A57Write_5cyc_2V], (instregex "^[FSU]CVT([AMNPZ][SU])?(_Int)?(v4f32|v2f64|v4i32|v2i64…
485 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FMAX|FMIN)(NM)?(v4f32|v2f64)")>;
489 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>;
496 def : InstRW<[A57Write_5cyc_2V_FP_Forward], (instregex "^FMULX?(v4f32|v2f64|v4i32|v2i64)")>;
509 def : InstRW<[A57WriteFPVMAQ, A57ReadFPVMA6], (instregex "^FML[AS](v4f32|v2f64|v4i32|v2i64)")>;
514 def : InstRW<[A57Write_5cyc_2V], (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
539 def : InstRW<[A57Write_5cyc_2V], (instregex "^[FU](RECP|RSQRT)(E|X)(v2f64|v4f32|v4i32)")>;
[all …]
H A DAArch64ISelDAGToDAG.cpp6163 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6191 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6219 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6247 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6275 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6303 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6331 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6359 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6387 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
6415 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
[all …]
H A DAArch64InstrInfo.td4990 (!cast<Instruction>(INST # v2f64) v2f64:$Rn)>;
5663 def : Pat<(v2f64 (AArch64frecpe (v2f64 FPR128:$Rn))),
5674 def : Pat<(v2f64 (AArch64frecps (v2f64 FPR128:$Rn), (v2f64 FPR128:$Rm))),
5703 def : Pat<(v2f64 (AArch64frsqrte (v2f64 FPR128:$Rn))),
5714 def : Pat<(v2f64 (AArch64frsqrts (v2f64 FPR128:$Rn), (v2f64 FPR128:$Rm))),
6248 def : Pat<(v2f64 (AArch64duplane64 (v2f64 V128:$Rn), VectorIndexD:$imm)),
6464 def : Pat<(v2f64 (vector_insert (v2f64 V128:$Rn),
7252 def : Pat<(v2f64 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn),
7257 def : Pat<(v2f64 (OpNode (v2f64 V128:$Rd), (v2f64 V128:$Rn),
8709 def : Pat<(v2f64 (bitconvert (f128 FPR128:$src))), (v2f64 FPR128:$src)>;
[all …]
H A DAArch64TargetTransformInfo.cpp677 LT.second == MVT::v2f64) && in getIntrinsicInstrCost()
2335 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
2338 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
2365 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
2366 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 }, in getCastInstrCost()
3011 { ISD::SELECT, MVT::v2i1, MVT::v2f64, 2 }, in getCmpSelInstrCost()
3851 {TTI::SK_Broadcast, MVT::v2f64, 1}, in getShuffleCost()
3865 {TTI::SK_Transpose, MVT::v2f64, 1}, in getShuffleCost()
3873 {TTI::SK_Select, MVT::v2f64, 1}, // mov. in getShuffleCost()
3895 {TTI::SK_Reverse, MVT::v2f64, 1}, // EXT in getShuffleCost()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA.td141 loadv2f64, loadv4f64, any_fma, v2f64,
144 loadv2f64, loadv4f64, X86any_Fmsub, v2f64,
148 v2f64, v4f64, SchedWriteFMA>, REX_W;
151 v2f64, v4f64, SchedWriteFMA>, REX_W;
583 defm VFMADDPD4 : fma4p<0x69, "vfmaddpd", any_fma, v2f64, v4f64,
585 defm VFMSUBPD4 : fma4p<0x6D, "vfmsubpd", X86any_Fmsub, v2f64, v4f64,
587 defm VFNMADDPD4 : fma4p<0x79, "vfnmaddpd", X86any_Fnmadd, v2f64, v4f64,
589 defm VFNMSUBPD4 : fma4p<0x7D, "vfnmsubpd", X86any_Fnmsub, v2f64, v4f64,
591 defm VFMADDSUBPD4 : fma4p<0x5D, "vfmaddsubpd", X86Fmaddsub, v2f64, v4f64,
593 defm VFMSUBADDPD4 : fma4p<0x5F, "vfmsubaddpd", X86Fmsubadd, v2f64, v4f64,
[all …]
H A DX86TargetTransformInfo.cpp1971 {TTI::SK_Select, MVT::v2f64, 1}, // movsd in getShuffleCost()
2016 {TTI::SK_Broadcast, MVT::v2f64, 1}, // shufpd in getShuffleCost()
2023 {TTI::SK_Reverse, MVT::v2f64, 1}, // shufpd in getShuffleCost()
2032 {TTI::SK_Select, MVT::v2f64, 1}, // movsd in getShuffleCost()
2039 {TTI::SK_Splice, MVT::v2f64, 1}, // shufpd in getShuffleCost()
3198 { ISD::SELECT, MVT::v2f64, { 1, 1, 1, 1 } }, in getCmpSelInstrCost()
3215 { ISD::SETCC, MVT::v2f64, { 1, 4, 1, 1 } }, in getCmpSelInstrCost()
3241 { ISD::SETCC, MVT::v2f64, { 1, 3, 1, 1 } }, in getCmpSelInstrCost()
3266 { ISD::SETCC, MVT::v2f64, { 1, 5, 1, 1 } }, in getCmpSelInstrCost()
5053 { ISD::FADD, MVT::v2f64, 3 }, in getArithmeticReductionCost()
[all …]
H A DX86InstrVecCompiler.td24 def : Pat<(f64 (extractelt (v2f64 VR128:$src), (iPTR 0))),
25 (COPY_TO_REGCLASS (v2f64 VR128:$src), FR64)>;
34 def : Pat<(f64 (extractelt (v2f64 VR128X:$src), (iPTR 0))),
35 (COPY_TO_REGCLASS (v2f64 VR128X:$src), FR64X)>;
45 def : Pat<(v2f64 (scalar_to_vector FR64:$src)),
56 def : Pat<(v2f64 (scalar_to_vector FR64X:$src)),
82 defm : subvector_subreg_lowering<VR128, v2f64, VR256, v4f64, sub_xmm>;
95 defm : subvector_subreg_lowering<VR128, v2f64, VR512, v8f64, sub_xmm>;
128 defm : subvec_zero_lowering<"APD", VR128, v4f64, v2f64, sub_xmm>;
140 defm : subvec_zero_lowering<"APDZ128", VR128X, v4f64, v2f64, sub_xmm>;
[all …]
H A DX86InstrSSE.td1422 def : Pat<(v2f64 (X86Movsd
1448 def : Pat<(v2f64 (X86Movsd
1453 def : Pat<(v2f64 (X86Movsd
1458 def : Pat<(v2f64 (X86Movsd
1463 def : Pat<(v2f64 (X86Movsd
1476 def : Pat<(v2f64 (X86Movsd
1482 def : Pat<(v2f64 (X86Movsd
1487 def : Pat<(v2f64 (X86Movsd
4380 def : Pat<(v2f64 (X86vzmovl (v2f64 VR128:$src))),
4384 def : Pat<(v2f64 (X86vzmovl (v2f64 VR128:$src))),
[all …]
H A DX86CallingConv.td148 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
180 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
225 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
274 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
336 CCIfType<[f32, f64, v4i32, v2i64, v4f32, v2f64],
721 CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
764 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
780 CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
796 CCIfNotVarArg<CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
816 CCIfNotVarArg<CCIfType<[v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.td60 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
80 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
125 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
132 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
137 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
199 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
235 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
258 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
261 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
282 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
H A DSystemZInstrVector.td206 defm : ReplicatePeephole<VLREPG, v2f64, load, f64>;
278 def : Pat<(v2f64 (z_loadeswap bdxaddr12only:$addr)),
467 defm : GenericVectorOps<v2f64, v2i64>;
1735 def : Pat<(v2f64 (bitconvert (v16i8 VR128:$src))), (v2f64 VR128:$src)>;
1736 def : Pat<(v2f64 (bitconvert (v8i16 VR128:$src))), (v2f64 VR128:$src)>;
1737 def : Pat<(v2f64 (bitconvert (v4i32 VR128:$src))), (v2f64 VR128:$src)>;
1738 def : Pat<(v2f64 (bitconvert (i128 VR128:$src))), (v2f64 VR128:$src)>;
1739 def : Pat<(v2f64 (bitconvert (v2i64 VR128:$src))), (v2f64 VR128:$src)>;
1740 def : Pat<(v2f64 (bitconvert (v4f32 VR128:$src))), (v2f64 VR128:$src)>;
1741 def : Pat<(v2f64 (bitconvert (f128 VR128:$src))), (v2f64 VR128:$src)>;
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td115 def vfseteq_v2f64 : vfsetcc_type<v2i64, v2f64, SETEQ>;
117 def vfsetge_v2f64 : vfsetcc_type<v2i64, v2f64, SETGE>;
119 def vfsetgt_v2f64 : vfsetcc_type<v2i64, v2f64, SETGT>;
121 def vfsetle_v2f64 : vfsetcc_type<v2i64, v2f64, SETLE>;
123 def vfsetlt_v2f64 : vfsetcc_type<v2i64, v2f64, SETLT>;
125 def vfsetne_v2f64 : vfsetcc_type<v2i64, v2f64, SETNE>;
139 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
3614 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3617 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
4046 (f64 (vector_extract v2f64:$ws, i64:$idx)),
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrSIMD.td47 defm "" : ARGUMENT<V128, v2f64>;
134 let vt = v2f64;
629 def : Pat<(vector_extract (v2f64 V128:$vec), (i32 LaneIdx2:$idx)),
676 def : Pat<(vector_insert (v2f64 V128:$vec), F64:$x, undef),
751 def : Pat<(v2i64 (nodes[0] (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1163 def : Pat<(v2f64 (frint (v2f64 V128:$src))), (NEAREST_F64x2 V128:$src)>;
1167 def : Pat<(v2f64 (froundeven (v2f64 V128:$src))), (NEAREST_F64x2 V128:$src)>;
1239 def : Pat<(v2f64 (int_wasm_pmin (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1241 def : Pat<(v2f64 (int_wasm_pmax (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1361 def : Pat<(v2f64 (extloadv2f32 (i32 I32:$addr))),
[all …]
H A DWebAssemblyISelLowering.cpp88 MVT::v2f64}) { in WebAssemblyTargetLowering()
196 MVT::v2f64}) in WebAssemblyTargetLowering()
201 MVT::v2f64}) in WebAssemblyTargetLowering()
206 MVT::v2f64}) in WebAssemblyTargetLowering()
217 MVT::v2f64}) in WebAssemblyTargetLowering()
225 MVT::v2f64}) in WebAssemblyTargetLowering()
252 for (auto T : {MVT::v4f32, MVT::v2f64}) in WebAssemblyTargetLowering()
262 for (auto T : {MVT::v2i64, MVT::v2f64}) in WebAssemblyTargetLowering()
317 MVT::v2f64}) { in WebAssemblyTargetLowering()
1971 if (Op.getValueType() != MVT::v2f64) in LowerConvertLow()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp54 case MVT::v2f64: in toValType()

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