| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetPfmCounters.td | 24 // The name of the ProcResource on which uops are issued. This is used by 62 // Processors can define how to measure uops by defining a UopsCounter. 64 // Processors can define how to measure issued uops by defining IssueCounters.
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| H A D | TargetItinerary.td | 111 list<Bypass> bypasses = [], int uops = 1> { 113 int NumMicroOps = uops;
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| /freebsd-14.2/usr.sbin/pmcstudy/ |
| H A D | pmcstudy.c | 546 struct counters *uops; in br_mispredictib() local 574 uo = uops->vals[pos] * 1.0; in br_mispredictib() 583 uo = uops->sum * 1.0; in br_mispredictib() 600 struct counters *uops; in br_mispredict_broad() local 619 uo = uops->vals[pos] * 1.0; in br_mispredict_broad() 626 uo = uops->sum * 1.0; in br_mispredict_broad() 1592 struct counters *uops; in efficiency1() local 1601 ot = uops->vals[pos] * 1.0; in efficiency1() 1604 ot = uops->sum * 1.0; in efficiency1() 1617 struct counters *uops; in efficiency2() local [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedKryo.td | 16 // uops. Now, the latency spreadsheet has information based on fragmented uops, 20 let IssueWidth = 5; // 5-wide issue for expanded uops
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| H A D | AArch64SchedFalkor.td | 19 let IssueWidth = 8; // 8 uops are dispatched per cycle.
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| H A D | AArch64SchedAmpere1.td | 17 // decoded into internal micro-ops (uops). 571 // across Unit A or B for both uops.
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| H A D | AArch64SchedAmpere1B.td | 17 // decoded into internal micro-ops (uops). 527 // across Unit A or B for both uops.
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| H A D | AArch64SchedExynosM3.td | 20 let IssueWidth = 6; // Up to 6 uops per cycle.
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| H A D | AArch64SchedExynosM4.td | 20 let IssueWidth = 6; // Up to 6 uops per cycle.
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| H A D | AArch64SchedExynosM5.td | 20 let IssueWidth = 6; // Up to 6 uops per cycle.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA8.td | 154 [1, 1, 1, 1, 3], [], -1>, // dynamic uops 159 [2, 1, 1, 1, 3], [], -1>, // dynamic uops 165 [1, 2, 1, 1, 3], [], -1>, // dynamic uops 170 [1, 1, 3], [], -1>, // dynamic uops 176 [1, 1, 3], [], -1>, // dynamic uops 232 [], [], -1>, // dynamic uops 237 [2], [], -1>, // dynamic uops 399 [1, 1, 1, 2], [], -1>, // dynamic uops 407 [2, 1, 1, 1, 2], [], -1>, // dynamic uops 427 [1, 1, 1, 1], [], -1>, // dynamic uops [all …]
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| H A D | ARMScheduleA9.td | 287 -1>, // dynamic uops 296 -1>, // dynamic uops 306 -1>, // dynamic uops 315 -1>, // dynamic uops 325 -1>, // dynamic uops 420 [], [], -1>, // dynamic uops 427 [2], [], -1>, // dynamic uops 725 [1, 1, 1, 1], [], -1>, // dynamic uops 735 [2, 1, 1, 1], [], -1>, // dynamic uops 763 [1, 1, 1, 1], [], -1>, // dynamic uops [all …]
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| H A D | ARMSchedule.td | 194 class BranchWriteRes<int lat, int uops, list<ProcResourceKind> resl, 199 let NumMicroOps = !add(wr.NumMicroOps, uops);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SchedSkylakeServer.td | 2111 let NumMicroOps = 5; // 2 uops perform multiple loads 2120 let NumMicroOps = 5; // 2 uops perform multiple loads 2130 let NumMicroOps = 5; // 2 uops perform multiple loads 2140 let NumMicroOps = 5; // 2 uops perform multiple loads 2168 let NumMicroOps = 5; // 2 uops perform multiple loads 2177 let NumMicroOps = 5; // 2 uops peform multiple loads 2187 let NumMicroOps = 5; // 2 uops perform multiple loads 2367 // echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=- 2368 // echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
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| H A D | X86SchedIceLake.td | 2130 let NumMicroOps = 5; // 2 uops perform multiple loads 2139 let NumMicroOps = 5; // 2 uops perform multiple loads 2149 let NumMicroOps = 5; // 2 uops perform multiple loads 2159 let NumMicroOps = 5; // 2 uops perform multiple loads 2187 let NumMicroOps = 5; // 2 uops perform multiple loads 2196 let NumMicroOps = 5; // 2 uops peform multiple loads 2206 let NumMicroOps = 5; // 2 uops perform multiple loads 2386 // echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=- 2387 // echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
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| H A D | X86SchedSkylakeClient.td | 1449 let NumMicroOps = 5; // 2 uops perform multiple loads 1458 let NumMicroOps = 5; // 2 uops peform multiple loads 1468 let NumMicroOps = 5; // 2 uops perform multiple loads 1603 // echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=- 1604 // echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
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| H A D | X86SchedSandyBridge.td | 1145 // echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=- 1146 // echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
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| H A D | X86ScheduleZnver1.td | 329 …esFpuPair<WriteFRnd, [ZnFPU3], 4, [1], 1, 7, 1>; // FIXME: Should folds require 1 extra uops? 330 …esFpuPair<WriteFRndY, [ZnFPU3], 4, [1], 1, 7, 1>; // FIXME: Should folds require 1 extra uops?
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| H A D | X86SchedBroadwell.td | 1533 // echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=- 1534 // echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
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| H A D | X86SchedHaswell.td | 1773 // echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=- 1774 // echo 'vxorpd %xmm0, %xmm0, %xmm1' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
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| H A D | X86ScheduleZnver3.td | 687 // FIXME: uops for 8-bit division measures as 2. for others it's a guess.
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| H A D | X86SchedAlderlakeP.td | 15 // Alderlake-P core can allocate 6 uops per cycle.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | VLIWMachineScheduler.cpp | 365 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard() local 366 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
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| H A D | MachineScheduler.cpp | 2422 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard() local 2423 if ((CurrMOps > 0) && (CurrMOps + uops > SchedModel->getIssueWidth())) { in checkHazard()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsScheduleP5600.td | 530 // These instructions are split across multiple uops (in different pipelines)
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