| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 127 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
128 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
129 setIndexedStoreAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
130 setIndexedStoreAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2525 void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, MVT VT, in setIndexedStoreAction() function
2531 void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, ArrayRef<MVT> VTs, in setIndexedStoreAction() function
2534 setIndexedStoreAction(IdxModes, VT, Action); in setIndexedStoreAction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 801 setIndexedStoreAction(IM, VT, Expand); in initActions()
821 setIndexedStoreAction(IM, VT, Expand); in initActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 228 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
229 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
230 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
231 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
232 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
236 setIndexedStoreAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
237 setIndexedStoreAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 318 setIndexedStoreAction(im, VT, Legal); in addMVEVectorTypes()
348 setIndexedStoreAction(im, VT, Legal); in addMVEVectorTypes()
432 setIndexedStoreAction(im, VT, Legal); in addMVEVectorTypes()
1124 setIndexedStoreAction(im, MVT::i1, Legal); in ARMTargetLowering()
1125 setIndexedStoreAction(im, MVT::i8, Legal); in ARMTargetLowering()
1126 setIndexedStoreAction(im, MVT::i16, Legal); in ARMTargetLowering()
1127 setIndexedStoreAction(im, MVT::i32, Legal); in ARMTargetLowering()
1132 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 965 setIndexedStoreAction(im, MVT::i8, Legal); in AArch64TargetLowering()
966 setIndexedStoreAction(im, MVT::i16, Legal); in AArch64TargetLowering()
967 setIndexedStoreAction(im, MVT::i32, Legal); in AArch64TargetLowering()
968 setIndexedStoreAction(im, MVT::i64, Legal); in AArch64TargetLowering()
969 setIndexedStoreAction(im, MVT::f64, Legal); in AArch64TargetLowering()
970 setIndexedStoreAction(im, MVT::f32, Legal); in AArch64TargetLowering()
971 setIndexedStoreAction(im, MVT::f16, Legal); in AArch64TargetLowering()
972 setIndexedStoreAction(im, MVT::bf16, Legal); in AArch64TargetLowering()
1778 setIndexedStoreAction(im, VT, Legal); in addTypeForNEON()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1802 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| H A D | HexagonISelLoweringHVX.cpp | 194 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1357 setIndexedStoreAction(im, MVT::i8, Legal); in RISCVTargetLowering()
1359 setIndexedStoreAction(im, MVT::i16, Legal); in RISCVTargetLowering()
1361 setIndexedStoreAction(im, MVT::i32, Legal); in RISCVTargetLowering()
1365 setIndexedStoreAction(im, MVT::i64, Legal); in RISCVTargetLowering()
|