| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 123 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
124 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
125 setIndexedLoadAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
126 setIndexedLoadAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 61 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
62 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2508 void setIndexedLoadAction(ArrayRef<unsigned> IdxModes, MVT VT, in setIndexedLoadAction() function
2514 void setIndexedLoadAction(ArrayRef<unsigned> IdxModes, ArrayRef<MVT> VTs, in setIndexedLoadAction() function
2517 setIndexedLoadAction(IdxModes, VT, Action); in setIndexedLoadAction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 800 setIndexedLoadAction(IM, VT, Expand); in initActions()
820 setIndexedLoadAction(IM, VT, Expand); in initActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 223 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
224 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
225 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
226 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
227 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
234 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
235 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 317 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes()
347 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes()
431 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes()
1120 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering()
1121 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering()
1122 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering()
1123 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering()
1131 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 957 setIndexedLoadAction(im, MVT::i8, Legal); in AArch64TargetLowering()
958 setIndexedLoadAction(im, MVT::i16, Legal); in AArch64TargetLowering()
959 setIndexedLoadAction(im, MVT::i32, Legal); in AArch64TargetLowering()
960 setIndexedLoadAction(im, MVT::i64, Legal); in AArch64TargetLowering()
961 setIndexedLoadAction(im, MVT::f64, Legal); in AArch64TargetLowering()
962 setIndexedLoadAction(im, MVT::f32, Legal); in AArch64TargetLowering()
963 setIndexedLoadAction(im, MVT::f16, Legal); in AArch64TargetLowering()
964 setIndexedLoadAction(im, MVT::bf16, Legal); in AArch64TargetLowering()
1777 setIndexedLoadAction(im, VT, Legal); in addTypeForNEON()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1801 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| H A D | HexagonISelLoweringHVX.cpp | 193 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1356 setIndexedLoadAction(im, MVT::i8, Legal); in RISCVTargetLowering()
1358 setIndexedLoadAction(im, MVT::i16, Legal); in RISCVTargetLowering()
1360 setIndexedLoadAction(im, MVT::i32, Legal); in RISCVTargetLowering()
1364 setIndexedLoadAction(im, MVT::i64, Legal); in RISCVTargetLowering()
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