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Searched refs:sdst (Results 1 – 25 of 25) sorted by relevance

/freebsd-14.2/contrib/tcsh/
H A Dtc.str.c180 return (sdst);
199 return (sdst);
235 dst = sdst;
262 Char *sdst; local
264 sdst = dst;
273 Char *sdst; local
278 sdst = dst;
300 Char *sdst; local
305 sdst = dst;
545 dst = sdst;
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSOPInstructions.td65 bits<7> sdst;
139 opName, (outs SReg_64:$sdst), (ins), "$sdst", pattern> {
570 bits<7> sdst;
982 bits<7> sdst;
1015 "$sdst, $simm16",
1022 "$sdst, $simm16",
1037 "$sdst, $simm16">,
1046 "$sdst, $simm16",
1102 "$sdst, $simm16"
1112 "$sdst, $simm16",
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H A DSMInstructions.td75 bits<7> sdst;
113 : SM_Pseudo<opName, (outs dstClass:$sdst),
181 opName, (outs SReg_64_XEXEC:$sdst), (ins),
182 " $sdst", [(set i64:$sdst, (node))]> {
208 " $sdst", [(set i32:$sdst, (node))]> {
301 // does sdst for SMRD on SI/CI?
584 let sdst = ?;
774 let Inst{21-15} = sdst{6-0};
1134 let sdst = ?;
1351 let sdst = ?;
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H A DVOPCInstructions.td255 [(set i1:$sdst,
832 [(set i1:$sdst,
1275 bits<8> sdst;
1276 let Inst{7-0} = sdst;
1310 bits<8> sdst;
1311 let Inst{7-0} = sdst;
1340 bits<8> sdst;
1439 bits<8> sdst;
1883 bits<8> sdst;
2000 bits<8> sdst;
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H A DSIPeepholeSDWA.cpp871 const MachineOperand *Sdst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2()
883 MachineOperand *CarryOut = TII->getNamedOperand(MISucc, AMDGPU::OpName::sdst); in pseudoOpConvertToVOP2()
933 const MachineOperand *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in isConvertibleToSDWA()
944 } else if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst) || in isConvertibleToSDWA()
1005 } else if ((Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst))) { in convertToSDWA()
1006 assert(Dst && AMDGPU::hasNamedOperand(SDWAOpcode, AMDGPU::OpName::sdst)); in convertToSDWA()
1009 assert(AMDGPU::hasNamedOperand(SDWAOpcode, AMDGPU::OpName::sdst)); in convertToSDWA()
H A DSIInstructions.td145 def S_MOV_B64_IMM_PSEUDO : SPseudoInstSI <(outs SReg_64:$sdst),
268 def WAVE_REDUCE_UMIN_PSEUDO_U32 : VPseudoInstSI <(outs SGPR_32:$sdst),
293 (outs SReg_64:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1),
294 [(set SReg_64:$sdst, (UniformBinFrag<add> i64:$src0, i64:$src1))]
298 (outs SReg_64:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1),
299 [(set SReg_64:$sdst, (UniformBinFrag<sub> i64:$src0, i64:$src1))]
320 (outs SReg_64:$sdst), (ins),
321 [(set SReg_64:$sdst, (i64 (readcyclecounter)))]
327 def GET_GROUPSTATICSIZE : SPseudoInstSI <(outs SReg_32:$sdst), (ins),
328 [(set SReg_32:$sdst, (int_amdgcn_groupstaticsize))]>;
[all …]
H A DVOPInstructions.td363 bits<7> sdst;
367 let Inst{14-8} = sdst;
584 bits<8> sdst; // {vcc_sdst{0}, sdst{6-0}}
586 let Inst{46-40} = !if(P.EmitDst, sdst{6-0}, ?);
587 let Inst{47} = !if(P.EmitDst, sdst{7}, 0);
1373 bits<7> sdst;
1374 let Inst{14 - 8} = sdst;
1379 bits<7> sdst;
1380 let Inst{14 - 8} = sdst;
H A DGCNDPPCombine.cpp130 if (const auto *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) { in isShrinkable()
245 if (auto *SDst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::sdst)) { in createDPPInst()
H A DSIInstrInfo.td1945 (outs DstRCSDWA:$sdst),
1953 string dst = !if(!eq(DstVT.Size, 1), "$sdst", "$vdst"); // use $sdst for VOPC
2024 "$sdst",
2026 ""); // use $sdst for VOPC
2052 "$sdst",
2054 ""); // use $sdst for VOPC
2127 "$sdst", // VOPC
2811 // Maps a v_cmpx opcode with sdst to opcode without sdst.
H A DSIShrinkInstructions.cpp759 MachineOperand *Op = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in tryReplaceDeadSDST()
968 AMDGPU::OpName::sdst); in runOnMachineFunction()
H A DSIOptimizeExecMasking.cpp677 MachineOperand *VCmpDest = TII->getNamedOperand(*VCmp, AMDGPU::OpName::sdst); in tryRecordVCmpxAndSaveexecSequence()
H A DVOP3Instructions.td23 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
24 let Asm64 = "$vdst, $sdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$omod";
37 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
38 let Asm64 = "$vdst, $sdst, $src0, $src1, $src2$clamp";
H A DGCNHazardRecognizer.cpp1206 SDSTName = AMDGPU::OpName::sdst; in fixSMEMtoVectorWriteHazards()
1299 if (TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) in fixVcmpxExecWARHazard()
2766 const MachineOperand *SDSTOp = TII.getNamedOperand(*MI, AMDGPU::OpName::sdst); in fixVALUMaskWriteHazard()
H A DSILoadStoreOptimizer.cpp1114 if (const auto *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) { in getDataRegClass()
1435 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::sdst); in mergeSMemLoadImmPair()
1436 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::sdst); in mergeSMemLoadImmPair()
H A DVOP2Instructions.td352 (inst ps.Pfl.DstRC:$vdst, VOPDstS64orS32:$sdst,
544 let AsmVOP3Base = "$vdst, $sdst, $src0, $src1$clamp";
561 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
577 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
578 let AsmVOP3Base = "$vdst, $sdst, $src0, $src1, $src2$clamp";
H A DAMDGPU.td450 def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
752 def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
H A DSIInstrInfo.cpp490 DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::sdst); in getMemOperandsWithOffsetWidth()
4384 } else if (AMDGPU::hasNamedOperand(Op32, AMDGPU::OpName::sdst)) { in buildShrunkInst()
/freebsd-14.2/crypto/openssl/providers/implementations/macs/
H A Dsiphash_prov.c76 struct siphash_data_st *sdst; in siphash_dup() local
80 sdst = OPENSSL_malloc(sizeof(*sdst)); in siphash_dup()
81 if (sdst == NULL) in siphash_dup()
84 *sdst = *ssrc; in siphash_dup()
85 return sdst; in siphash_dup()
/freebsd-14.2/sys/netinet6/
H A Dicmp6.c2336 struct sockaddr_in6 sdst; in icmp6_redirect_input() local
2343 bzero(&sdst, sizeof(sdst)); in icmp6_redirect_input()
2345 sdst.sin6_family = ssrc.sin6_family = AF_INET6; in icmp6_redirect_input()
2346 sdst.sin6_len = ssrc.sin6_len = sizeof(struct sockaddr_in6); in icmp6_redirect_input()
2347 bcopy(&reddst6, &sdst.sin6_addr, sizeof(struct in6_addr)); in icmp6_redirect_input()
2361 rib_add_redirect(fibnum, (struct sockaddr *)&sdst, gw, in icmp6_redirect_input()
/freebsd-14.2/crypto/heimdal/lib/roken/
H A Dglob.c810 Char *sdst = dst; in g_strcat() local
818 return (sdst); in g_strcat()
/freebsd-14.2/usr.sbin/route6d/
H A Droute6d.c1954 rt_del(const struct sockaddr_in6 *sdst, in rt_del() argument
1965 if (sdst->sin6_family != AF_INET6) { in rt_del()
1969 if (IN6_IS_ADDR_LINKLOCAL(&sdst->sin6_addr) in rt_del()
1970 || IN6_ARE_ADDR_EQUAL(&sdst->sin6_addr, &in6addr_loopback) in rt_del()
1971 || IN6_IS_ADDR_MULTICAST(&sdst->sin6_addr)) { in rt_del()
1973 inet6_n2p(&sdst->sin6_addr)); in rt_del()
1976 dst = &sdst->sin6_addr; in rt_del()
1994 &sdst->sin6_addr) in rt_del()
/freebsd-14.2/sys/cam/scsi/
H A Dscsi_ch.h84 uint8_t sdst[2]; /* second destination address */ member
H A Dscsi_ch.c1777 scsi_ulto2b(dst2, scsi_cmd->sdst); in scsi_exchange_medium()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp873 if (AMDGPU::hasNamedOperand(MI.getOpcode(), AMDGPU::OpName::sdst)) in convertSDWAInst()
877 int SDst = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst); in convertSDWAInst()
881 AMDGPU::OpName::sdst); in convertSDWAInst()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4666 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::sdst); in validateWaitCnt()