| /freebsd-14.2/contrib/diff/src/ |
| H A D | diff.c | 793 char *regexps = reglist->regexps; in add_regexp() 794 size_t len = reglist->len; in add_regexp() 797 size_t size = reglist->size; in add_regexp() 807 reglist->size = size; in add_regexp() 808 reglist->regexps = regexps = xrealloc (regexps, size); in add_regexp() 823 summarize_regexp_list (struct regexp_list *reglist) in summarize_regexp_list() argument 825 if (reglist->regexps) in summarize_regexp_list() 828 reglist->buf->fastmap = xmalloc (1 << CHAR_BIT); in summarize_regexp_list() 829 if (reglist->multiple_regexps) in summarize_regexp_list() 833 char const *m = re_compile_pattern (reglist->regexps, reglist->len, in summarize_regexp_list() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 514 Op->RegList.List1From = reglist[i]; in createRegList() 517 Op->RegList.List2From = reglist[i]; in createRegList() 520 Op->RegList.List3From = reglist[i]; in createRegList() 523 Op->RegList.List4From = reglist[i]; in createRegList() 1449 SmallVector<unsigned, 4> reglist; in parseRegList() local 1466 reglist.push_back(Ry); in parseRegList() 1467 reglist.push_back(Rz); in parseRegList() 1473 reglist.push_back(Ry); in parseRegList() 1474 reglist.push_back(Ry); in parseRegList() 1476 reglist.push_back(Ry); in parseRegList() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb.td | 826 def tLDMIA : T1I<(outs), (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops), 841 PseudoInstExpansion<(tLDMIA tGPR:$Rn, pred:$p, reglist:$regs)> { 844 let InOperandList = (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops); 854 (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops), 867 (tLDMIA tGPR:$Rn, pred:$p, reglist:$regs), 0>, 872 def tPOP : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops), 882 def tPUSH : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops), 1757 def tPOP_RET : tPseudoExpand<(outs), (ins pred:$p, reglist:$regs, variable_ops), 1759 (tPOP pred:$p, reglist:$regs)>, Sched<[WriteBrL]>;
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| H A D | ARMInstrThumb2.td | 2054 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3938 (t2LDMIA_UPD GPR:$wb, GPR:$Rn, pred:$p, reglist:$regs)>, 5180 (t2STMIA GPR:$Rn, pred:$p, reglist:$regs)>; 5182 (t2STMIA_UPD GPR:$Rn, pred:$p, reglist:$regs)>; 5186 (t2LDMIA GPR:$Rn, pred:$p, reglist:$regs)>; 5188 (t2LDMIA_UPD GPR:$Rn, pred:$p, reglist:$regs)>; 5192 (t2STMDB GPR:$Rn, pred:$p, reglist:$regs)>; 5194 (t2STMDB_UPD GPR:$Rn, pred:$p, reglist:$regs)>; 5198 (t2LDMDB GPR:$Rn, pred:$p, reglist:$regs)>; 5200 (t2LDMDB_UPD GPR:$Rn, pred:$p, reglist:$regs)>; [all …]
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| H A D | ARMInstrInfo.td | 601 def reglist : Operand<i32> { 3483 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3492 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3503 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3512 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3523 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3532 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3543 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3552 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3584 (LDMIA_UPD GPR:$wb, GPR:$Rn, pred:$p, reglist:$regs)>, [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsInstrInfo.td | 524 def reglist : Operand<i32> { 546 InstSE<(outs), (ins reglist:$rt, mem_mm_12:$addr), 553 InstSE<(outs reglist:$rt), (ins mem_mm_12:$addr), 889 MipsAsmPseudoInst<(outs reglist:$rt), (ins mem_mm_12:$addr), 893 MipsAsmPseudoInst<(outs), (ins reglist:$rt, mem_mm_12:$addr),
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo16Instr.td | 392 (ins reglist:$regs, variable_ops), "push16 $regs", []> { 404 (ins reglist:$regs, variable_ops), "pop16 $regs", []> {
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| H A D | CSKYInstrInfo.td | 453 def reglist : Operand<iPTR> { 890 def PUSH32 : I_12_PP<0b11111, 0b00000, (outs), (ins reglist:$regs, variable_ops), "push32 $regs">; 893 def POP32 : I_12_PP<0b11110, 0b00000, (outs), (ins reglist:$regs, variable_ops), "pop32 $regs">;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2456 unsigned reglist = fieldFromInstruction(Insn, 0, 16); in DecodeMemMultipleWritebackInstruction() local 2534 if (!Check(S, DecodeRegListOperand(Inst, reglist, Address, Decoder))) in DecodeMemMultipleWritebackInstruction() 6447 unsigned reglist = (fieldFromInstruction(Insn, 1, 7) << 1) | in DecodeVSCCLRM() local 6450 if (!Check(S, DecodeDPRRegListOperand(Inst, reglist, Address, Decoder))) { in DecodeVSCCLRM() 6454 unsigned reglist = fieldFromInstruction(Insn, 0, 8) | in DecodeVSCCLRM() local 6457 if (!Check(S, DecodeSPRRegListOperand(Inst, reglist, Address, Decoder))) { in DecodeVSCCLRM()
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