Searched refs:regclasses (Results 1 – 14 of 14) sorted by relevance
59 for (const TargetRegisterClass *RC : TRI->regclasses()) in ResourcePriorityQueue()359 for (const TargetRegisterClass *RC : TRI->regclasses()) in regPressureDelta()363 for (const TargetRegisterClass *RC : TRI->regclasses()) { in regPressureDelta()
1774 for (const TargetRegisterClass *RC : TRI->regclasses()) in RegReductionPQBase()2083 for (const TargetRegisterClass *RC : TRI->regclasses()) { in dumpRegPressure()
5561 for (const TargetRegisterClass *RC : RI->regclasses()) { in getRegForInlineAsmConstraint()
220 for (const TargetRegisterClass* RC : regclasses()) { in getMinimalPhysRegClass()238 for (const TargetRegisterClass *RC : regclasses()) { in getMinimalPhysRegClassLLT()266 for (const TargetRegisterClass *C : regclasses()) in getAllocatableSet()
206 for (const TargetRegisterClass *C : TRI->regclasses()) { in computePSetLimit()
595 for (const TargetRegisterClass *RC : TRI->regclasses()) { in isForwardableRegClassCopy()611 for (const TargetRegisterClass *RC : TRI->regclasses()) { in isForwardableRegClassCopy()1197 for (const TargetRegisterClass *RC : TRI->regclasses()) { in EliminateSpillageCopies()
34 for (const TargetRegisterClass *RC : TRI.regclasses()) { in PhysicalRegisterInfo()
1278 for (const TargetRegisterClass *TRC : TRI->regclasses()) { in computePressureSetLimit()
446 iterator_range<regclass_iterator> regclasses() const { in regclasses() function
243 // FIXME: This could be better modeled by looking at the regclasses of the operands.
224 for (const TargetRegisterClass *RC : TRI.regclasses()) { in HexagonBlockRanges()
781 iterator_range<regclass_iterator> regclasses() const { in regclasses() function
1038 for (const TargetRegisterClass *RC : TRI.regclasses()) { in MLocTracker()1530 for (const auto *TRCI : TRI->regclasses()) in getValueForInstrRef()
581 // FIXME: This could be better modeled by looking at the regclasses of the operands.