Searched refs:regLiveIn (Results 1 – 1 of 1) sorted by relevance
247 regLiveIn, enumerator648 setPhysRegState(Reg, regLiveIn); in reloadAtBegin()663 if (RegUnitStates[FirstUnit] == regLiveIn) in reloadAtBegin()1202 case regLiveIn: in dumpState()