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Searched refs:pulse (Results 1 – 25 of 114) sorted by relevance

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/freebsd-14.2/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_dfs.c272 if (!pulse->period || !pulse->w1) in mt76x02_dfs_check_hw_pulse()
277 if (pulse->engine > 3) in mt76x02_dfs_check_hw_pulse()
280 if (pulse->engine == 3) { in mt76x02_dfs_check_hw_pulse()
286 if (pulse->w1 < 120) in mt76x02_dfs_check_hw_pulse()
289 pulse->period >= 6400) && in mt76x02_dfs_check_hw_pulse()
301 if (pulse->engine >= 3) in mt76x02_dfs_check_hw_pulse()
313 if (pulse->w1 <= 130) in mt76x02_dfs_check_hw_pulse()
321 if (pulse->engine > 3) in mt76x02_dfs_check_hw_pulse()
324 if (pulse->engine == 3) { in mt76x02_dfs_check_hw_pulse()
330 if (pulse->w1 < 120) in mt76x02_dfs_check_hw_pulse()
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
45 Load current pulse width in microsecond after strobe pin pulse high.
52 Fsin1 pulse high delay in microsecond after vsync signal pulse high.
59 Fsin1 pulse high width in microsecond after vsync signal pulse high.
66 Fsin2 pulse high delay in microsecond after vsync signal pulse high.
73 Fsin2 pulse high width in microsecond after vsync signal pulse high.
78 richtek,es-pulse-width-us:
79 description: Eye safety function pulse width limit in microsecond.
/freebsd-14.2/sys/contrib/device-tree/Bindings/i2c/
H A Dst,sti-i2c.yaml37 st,i2c-min-scl-pulse-width-us:
39 The minimum valid SCL pulse width that is allowed through the
42 st,i2c-min-sda-pulse-width-us:
44 The minimum valid SDA pulse width that is allowed through the
69 st,i2c-min-scl-pulse-width-us = <0>;
70 st,i2c-min-sda-pulse-width-us = <5>;
H A Di2c-st.txt17 - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
19 - st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is
39 st,i2c-min-scl-pulse-width-us = <0>;
40 st,i2c-min-sda-pulse-width-us = <5>;
/freebsd-14.2/sys/contrib/device-tree/Bindings/memory-controllers/
H A Datmel,ebi.txt87 - atmel,smc-ncs-rd-pulse-ns
88 - atmel,smc-nrd-pulse-ns
89 - atmel,smc-ncs-wr-pulse-ns
90 - atmel,smc-nwe-pulse-ns
128 atmel,smc-ncs-rd-pulse-ns = <84>;
129 atmel,smc-ncs-wr-pulse-ns = <84>;
130 atmel,smc-nrd-pulse-ns = <76>;
131 atmel,smc-nwe-pulse-ns = <76>;
/freebsd-14.2/sys/contrib/device-tree/src/arm/
H A Dstihxxx-b2120.dtsi101 st,i2c-min-scl-pulse-width-us = <0>;
102 st,i2c-min-sda-pulse-width-us = <5>;
108 st,i2c-min-scl-pulse-width-us = <0>;
109 st,i2c-min-sda-pulse-width-us = <5>;
138 st,i2c-min-scl-pulse-width-us = <0>;
139 st,i2c-min-sda-pulse-width-us = <5>;
H A Dsama5d3xcm.dtsi69 atmel,smc-ncs-rd-pulse-ns = <84>;
70 atmel,smc-ncs-wr-pulse-ns = <84>;
71 atmel,smc-nrd-pulse-ns = <76>;
72 atmel,smc-nwe-pulse-ns = <76>;
H A Dstih418-b2199.dts81 st,i2c-min-scl-pulse-width-us = <0>;
82 st,i2c-min-sda-pulse-width-us = <5>;
H A Dkirkwood-linksys-viper.dts64 white-pulse {
65 label = "viper:white:pulse";
76 pmx_led_white_pulse: pmx-led-white-pulse {
/freebsd-14.2/sys/contrib/device-tree/Bindings/thermal/
H A Dnvidia,tegra124-soctherm.txt48 It is the throttling depth of pulse skippers, it's the percentage
51 level of pulse skippers, which used to throttle clock frequencies. It
57 It is the level of pulse skippers, which used to throttle clock
124 * the HW will skip cpu clock's pulse in 85% depth,
125 * skip gpu clock's pulse in 85% level
137 * the HW will skip cpu clock's pulse in 50% depth,
138 * skip gpu clock's pulse in 50% level
151 * settings to skip cpu pulse.
178 * the HW will skip cpu clock's pulse in HIGH level
189 * the HW will skip cpu clock's pulse in MED level
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/sound/
H A Dawinic,aw8738.yaml14 (set using one-wire pulse control). The mode configures the speaker-guard
26 GPIO used for one-wire pulse control. The pin is typically called SHDN
32 description: Operation mode (number of pulses for one-wire pulse control)
H A Dda7219.txt46 - dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV).
48 - dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
H A Deverest,es8326.yaml79 Bit(0-3) 0 means irq pulse equals 512*internal clock
80 1 means irq pulse equals 1024*internal clock
82 7 means irq pulse equals 65536*internal clock
/freebsd-14.2/sys/contrib/device-tree/Bindings/mfd/
H A Drohm,bd9571mwv.yaml55 rohm,rstbmode-pulse:
58 The RSTB signal is configured for pulse mode, to accommodate a momentary
95 - rohm,rstbmode-pulse
115 rohm,rstbmode-pulse;
H A Dbd9571mwv.txt41 - rohm,rstbmode-pulse: The RSTB signal is configured for pulse mode, to
58 rohm,rstbmode-pulse;
/freebsd-14.2/sys/contrib/device-tree/Bindings/watchdog/
H A Daspeed-wdt.txt41 - aspeed,ext-pulse-duration: External signal pulse duration in microseconds
47 is configured as push-pull, then set the pulse
/freebsd-14.2/sys/contrib/device-tree/Bindings/memory-controllers/ddr/
H A Djedec,lpddr3-timings.yaml36 CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds.
41 CKE minimum pulse width during SELF REFRESH (low pulse width during
H A Djedec,lpddr2.yaml81 CKE minimum pulse width (HIGH and LOW pulse width) in terms of number
116 CKE minimum pulse width during SELF REFRESH (low pulse width during
/freebsd-14.2/sys/contrib/device-tree/Bindings/pps/
H A Dpps-gpio.txt3 These properties describe a PPS (pulse-per-second) signal connected to
12 - echo-active-ms: duration in ms of the active portion of the echo pulse
/freebsd-14.2/contrib/file/magic/Magdir/
H A Dspectrum82 # length of PILOT pulse
84 # length of SYNC first pulse
86 # length of SYNC second pulse
88 # length of ZERO bit pulse
90 # length of ONE bit pulse
/freebsd-14.2/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dcsky,apb-intc.txt36 - csky,support-pulse-signal:
38 Description: to support pulse signal flag
/freebsd-14.2/sys/contrib/device-tree/Bindings/mtd/
H A Dlpc32xx-slc.txt15 - nxp,wwidth: Write pulse width (W_WIDTH)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
/freebsd-14.2/contrib/ntp/ntpd/
H A Drefclock_irig.c260 int pulse; /* cycle counter */ member
695 up->pulse = (up->pulse + 1) % 10; in irig_base()
700 if (up->pulse != 0) in irig_base()
702 up->pulse = 0; in irig_base()
715 switch(up->pulse) { in irig_base()
/freebsd-14.2/sys/contrib/device-tree/Bindings/ptp/
H A Dptp-qoriq.txt19 - fsl,tmr-fiper1 Fixed interval period pulse generator.
20 - fsl,tmr-fiper2 Fixed interval period pulse generator.
21 - fsl,tmr-fiper3 Fixed interval period pulse generator.
/freebsd-14.2/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dcp110-system-controller.txt91 mpp0 0 gpio, dev(ale1), au(i2smclk), ge0(rxd3), tdm(pclk), ptp(pulse), mss_i2c(sda), uart0(rxd), sa…
97 …1), ge0(txd3), spi0(csn2), au(i2sextclk), sata1(present_act), pcie2(clkreq), uart0(rxd), ptp(pulse)
119 mpp28 28 gpio, dev(csn1), spi1(csn0), mss_gpio5, ge0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), …
129 mpp38 38 gpio, uart2(txd), i2c0(sda), ptp(pulse), tdm(rstn), mss_i2c(sda), sata0(present_act), ge(m…
132 mpp41 41 gpio, sdio(pwr10), sdio(bus_pwr), mss_i2c(sck), au(i2slrclk), ptp(pulse), spi0(mosi), uart…
146 mpp55 55 gpio, ge1(rxctl_rxdv), ptp(pulse), sdio(led), sdio_cd(card_detect)
151 mpp60 60 gpio, mss_gpio6, ptp(pulse), tdm(dtx), au(i2smclk), spi0(csn1), uart0(rts), led(data), uar…

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