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/freebsd-14.2/sys/contrib/device-tree/Bindings/display/bridge/
H A Dfsl,imx8qxp-pixel-link.yaml4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
14 asynchronous linkage between pixel sources(display controller or
15 camera module) and pixel consumers(imaging or displays).
18 This binding documentation is only for pixel links whose pixel sources are
27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
68 const: fsl,imx8qxp-dc-pixel-link
78 const: fsl,imx8qm-dc-pixel-link
94 dc0-pixel-link0 {
95 compatible = "fsl,imx8qxp-dc-pixel-link";
[all …]
H A Dfsl,imx8qxp-pixel-combiner.yaml4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
15 of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
16 either one screen, two screens, or virtual screens. The pixel combiner is
17 also responsible for generating some of the control signals for the pixel link
23 - fsl,imx8qm-pixel-combiner
24 - fsl,imx8qxp-pixel-combiner
47 description: Represents a display stream of pixel combiner.
92 pixel-combiner@56020000 {
93 compatible = "fsl,imx8qxp-pixel-combiner";
H A Dfsl,imx8qxp-ldb.yaml33 A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in
34 the SoC reference manuals. The pixel mapper uses logic of LDBs embedded in
52 - description: pixel clock
57 - const: pixel
139 clock-names = "pixel", "bypass";
H A Dfsl,imx8qxp-pxl2dpi.yaml14 interfaces the pixel link 36-bit data output and the DSI controller’s
16 used in LVDS mode, to remap the pixel color codings between those modules.
46 description: The PXL2DPI input port node from pixel link.
/freebsd-14.2/sys/contrib/device-tree/Bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
29 pixel link MSI bus controller and does not allow SCFW user to control it.
43 - fsl,imx8qxp-display-pixel-link-msi-bus
44 - fsl,imx8qm-display-pixel-link-msi-bus
52 - fsl,imx8qxp-display-pixel-link-msi-bus
53 - fsl,imx8qm-display-pixel-link-msi-bus
97 compatible = "fsl,imx8qxp-display-pixel-link-msi-bus", "simple-pm-bus";
164 clock-names = "pixel", "bypass";
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi-controller-main.yaml60 - pixel:: Display pixel clock.
213 - const: pixel
232 - const: pixel
251 - const: pixel
270 - const: pixel
291 - const: pixel
308 - const: pixel
333 - const: pixel
357 - const: pixel
375 - const: pixel
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/media/i2c/
H A Daptina,mt9p031.yaml13 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor
60 pixel-clock-frequency:
63 description: Target pixel clock frequency
70 - pixel-clock-frequency
103 pixel-clock-frequency = <96000000>;
H A Dmt9p031.txt3 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor with
14 - pixel-clock-frequency: Pixel clock frequency.
35 pixel-clock-frequency = <96000000>;
H A Dimx258.yaml13 IMX258 is a diagonal 5.867mm (Type 1/3.06) 13 Mega-pixel CMOS active pixel
14 type stacked image sensor with a square pixel array of size 4208 x 3120. It
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/armada/
H A Dmarvell,dove-lcd.txt13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/
H A Dbrcm,bcm-vc4.txt31 b) pixel: The pixel clock.
45 b) pixel: The pixel clock that feeds the pixelvalve
72 c) pixel: The DSI pixel clock from CPRMAN
107 clock-names = "pixel", "hdmi";
115 clock-names = "core", "pixel";
137 clock-names = "phy", "escape", "pixel";
H A Dbrcm,bcm2835-dpi.yaml22 - description: The pixel clock that feeds the pixelvalve
27 - const: pixel
52 clock-names = "core", "pixel";
H A Dcirrus,clps711x-fb.txt11 - bits-per-pixel: Bits per pixel.
30 bits-per-pixel = <4>;
H A Dbrcm,bcm2835-hdmi.yaml26 - description: The pixel clock
31 - const: pixel
80 clock-names = "pixel", "hdmi";
H A Dbrcm,bcm2835-dsi0.yaml32 - description: The DSI pixel clock
38 - const: pixel
79 clock-names = "phy", "escape", "pixel";
H A Dwm,wm8505-fb.txt7 - bits-per-pixel : bit depth of framebuffer (16 or 32)
17 bits-per-pixel = <16>;
H A Dvia,vt8500-fb.txt8 - bits-per-pixel : bit depth of framebuffer (16 or 32)
19 bits-per-pixel = <16>;
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dpi.txt5 provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel
15 - clock-names: must contain "pixel", "engine", and "pll"
32 clock-names = "pixel", "engine", "pll";
H A Dmediatek,dpi.yaml15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
44 - const: pixel
84 clock-names = "pixel", "engine", "pll";
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/imx/
H A Dfsl,imx-fb.txt14 - bits-per-pixel: Bits per pixel
41 bits-per-pixel = <16>;
/freebsd-14.2/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx8mp-media-blk-ctrl.yaml55 - description: The pixel clock for the first CSI2 receiver (aclk)
56 - description: The pixel clock for the second CSI2 receiver (aclk)
57 - description: The pixel clock for the first LCDIF (pix_clk)
58 - description: The pixel clock for the second LCDIF (pix_clk)
/freebsd-14.2/contrib/file/magic/Magdir/
H A Dmodem20 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
44 # unusual image starting with black pixel
49 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
56 # unusual image with black pixel near beginning
/freebsd-14.2/sys/contrib/device-tree/Bindings/media/
H A Dvideo-interface-devices.yaml32 image sensor pixel array.
35 pixel array read-out order. The origin is set to the first pixel being
40 A typical example for a sensor with a 2592x1944 pixel array matrix
88 When projected on the sensor's pixel array, the image and the associated
94 pixel array, seen from the front of the camera sensor, as follows:
321 The camera sensor is typically mounted with its pixel array longer side
/freebsd-14.2/contrib/spleen/
H A DChangeLog69 - Shift vertical line and double vertical line characters one pixel
114 - Remove strain pixel on the '5' digit (5x8 version)
141 - Shift the middle bar of the digit '3' one pixel up, for better
147 - Make the slash inside the digit '0' one pixel thiner (32x64 version)
197 - Remove strain pixel on the '3' and 'k' characters (32x64 version)
206 - Shift the middle bar of the upper case 'G' one pixel down (12x24 version)
235 - Remove extra pixel from the '@' character (12x24 version)
266 percent sign, asterisk, plus, minus, and equal signs one pixel up, for
268 - Shift asterisk character up by one pixel, to align it with minus and plus
/freebsd-14.2/sys/contrib/device-tree/Bindings/display/ti/
H A Dti,j721e-dss.yaml67 - description: vp1 Video Port 1 pixel clock
68 - description: vp2 Video Port 2 pixel clock
69 - description: vp3 Video Port 3 pixel clock
70 - description: vp4 Video Port 4 pixel clock

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