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Searched refs:phase (Results 1 – 25 of 271) sorted by relevance

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/freebsd-14.2/sys/contrib/openzfs/module/zstd/lib/compress/
H A Dzstd_cwksp.h142 ZSTD_cwksp_alloc_phase_e phase; member
190 assert(phase >= ws->phase); in ZSTD_cwksp_internal_advance_phase()
191 if (phase > ws->phase) { in ZSTD_cwksp_internal_advance_phase()
192 if (ws->phase < ZSTD_cwksp_alloc_buffers && in ZSTD_cwksp_internal_advance_phase()
196 if (ws->phase < ZSTD_cwksp_alloc_aligned && in ZSTD_cwksp_internal_advance_phase()
210 ws->phase = phase; in ZSTD_cwksp_internal_advance_phase()
228 ZSTD_cwksp_internal_advance_phase(ws, phase); in ZSTD_cwksp_reserve_internal()
289 ZSTD_cwksp_internal_advance_phase(ws, phase); in ZSTD_cwksp_reserve_table()
434 if (ws->phase > ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_clear()
435 ws->phase = ZSTD_cwksp_alloc_buffers; in ZSTD_cwksp_clear()
[all …]
/freebsd-14.2/sys/contrib/zstd/lib/compress/
H A Dzstd_cwksp.h156 ZSTD_cwksp_alloc_phase_e phase; member
282 assert(phase >= ws->phase); in ZSTD_cwksp_internal_advance_phase()
283 if (phase > ws->phase) { in ZSTD_cwksp_internal_advance_phase()
285 if (ws->phase < ZSTD_cwksp_alloc_buffers && in ZSTD_cwksp_internal_advance_phase()
286 phase >= ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_internal_advance_phase()
291 if (ws->phase < ZSTD_cwksp_alloc_aligned && in ZSTD_cwksp_internal_advance_phase()
292 phase >= ZSTD_cwksp_alloc_aligned) { in ZSTD_cwksp_internal_advance_phase()
313 ws->phase = phase; in ZSTD_cwksp_internal_advance_phase()
561 if (ws->phase > ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_clear()
562 ws->phase = ZSTD_cwksp_alloc_buffers; in ZSTD_cwksp_clear()
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/freebsd-14.2/sys/contrib/device-tree/Bindings/mmc/
H A Dsamsung,exynos-dw-mshc.yaml54 - description: CIU clock phase shift value for tx mode
57 - description: CIU clock phase shift value for rx mode
61 The value of CUI clock phase shift value in transmit mode and CIU clock
62 phase shift value in receive mode for double data rate mode operation.
68 - description: CIU clock phase shift value for tx mode
71 - description: CIU clock phase shift value for rx mode
75 The value of CIU TX and RX clock phase shift value for HS400 mode
78 - valid value for tx phase shift and rx phase shift is 0 to 7.
82 phase shift clocks should be 0.
88 - description: CIU clock phase shift value for tx mode
[all …]
H A Dexynos-dw-mshc.txt32 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
33 in transmit mode and CIU clock phase shift value in receive mode for single
37 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
38 in transmit mode and CIU clock phase shift value in receive mode for double
41 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
47 - First Cell: CIU clock phase shift value for tx mode.
48 - Second Cell: CIU clock phase shift value for rx mode.
51 - valid value for tx phase shift and rx phase shift is 0 to 7.
52 - when CIU clock divider value is set to 3, all possible 8 phase shift
55 phase shift clocks should be 0.
/freebsd-14.2/contrib/ntp/libparse/
H A Dclk_meinberg.c225 unsigned short phase; /* current input phase */ member
610 if ( msg_buf->phase == MBG_NONE ) in gps_input()
618 msg_buf->phase = MBG_HEADER; /* receiving header */ in gps_input()
643 if ((msg_buf->phase == MBG_STRING) && in gps_input()
651 msg_buf->phase = MBG_NONE; /* buffer overflow - discard */ in gps_input()
658 switch (msg_buf->phase) in gps_input()
674 msg_buf->phase = MBG_NONE; in gps_input()
690 if ( msg_buf->phase == MBG_HEADER ) in gps_input()
708 msg_buf->phase = MBG_NONE; /* back to hunting mode */ in gps_input()
715 msg_buf->phase = MBG_NONE; /* back to hunting mode */ in gps_input()
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/freebsd-14.2/sys/kern/
H A Dkern_poll.c238 static uint32_t phase; variable
316 phase = 0; in hardclock_device_poll()
319 if (phase <= 2) { in hardclock_device_poll()
320 if (phase != 0) in hardclock_device_poll()
322 phase = 1; in hardclock_device_poll()
326 phase = 2; in hardclock_device_poll()
387 phase = 5; in netisr_pollmore()
411 phase = 0; in netisr_pollmore()
424 phase = 6; in netisr_pollmore()
449 phase = 3; in netisr_poll()
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/freebsd-14.2/crypto/openssl/crypto/
H A Dself_test_core.c24 const char *phase; member
90 (char *)st->phase, 0); in self_test_setparams()
110 ret->phase = ""; in OSSL_SELF_TEST_new()
127 st->phase = OSSL_SELF_TEST_PHASE_START; in OSSL_SELF_TEST_onbegin()
142 st->phase = in OSSL_SELF_TEST_onend()
147 st->phase = OSSL_SELF_TEST_PHASE_NONE; in OSSL_SELF_TEST_onend()
164 st->phase = OSSL_SELF_TEST_PHASE_CORRUPT; in OSSL_SELF_TEST_oncorrupt_byte()
/freebsd-14.2/sys/contrib/device-tree/Bindings/spi/
H A Dsamsung,spi-peripheral-props.yaml23 The sampling phase shift to be applied on the miso line (to account
25 - 0: No phase shift.
26 - 1: 90 degree phase shift sampling.
27 - 2: 180 degree phase shift sampling.
28 - 3: 270 degree phase shift sampling.
/freebsd-14.2/sys/contrib/openzfs/tests/zfs-tests/cmd/
H A Dsuid_write_to_file.c37 const char *name, *phase; in main() local
76 phase = argv[2]; in main()
77 if (strcmp(phase, "PRECRASH") == 0) { in main()
113 } else if (strcmp(phase, "REPLAY") == 0) { in main()
116 fprintf(stderr, "Invalid phase %s\n", phase); in main()
H A Dxattrtest.c93 static int phase = PHASE_ALL; variable
188 phase = strtol(optarg, NULL, 0); in parse_args()
189 if (phase <= PHASE_ALL || phase >= PHASE_INVAL) { in parse_args()
222 fprintf(stdout, "only: %d\n", phase); in parse_args()
292 post_hook(const char *phase) in post_hook() argument
294 char *argv[3] = { (char *)script, (char *)phase, NULL }; in post_hook()
689 if (phase == PHASE_ALL || phase == PHASE_CREATE) { in main()
695 if (phase == PHASE_ALL || phase == PHASE_SETXATTR) { in main()
701 if (phase == PHASE_ALL || phase == PHASE_GETXATTR) { in main()
707 if (!keep_files && (phase == PHASE_ALL || phase == PHASE_UNLINK)) { in main()
/freebsd-14.2/contrib/tcpdump/
H A Dprint-isakmp.c565 uint32_t phase,\
603 uint32_t phase,
666 uint32_t phase,
1337 switch (phase) { in ikev1_id_print()
2638 uint32_t phase, in ikev2_e_print()
2824 u_int phase; in ikev1_print() local
2830 if (phase == 1) in ikev1_print()
2831 ND_PRINT(" phase %u", phase); in ikev1_print()
2915 ep, phase, doi, proto, depth); in ikev2_sub0_print()
2982 u_int phase; in ikev2_print() local
[all …]
/freebsd-14.2/crypto/openssl/test/
H A Dprovider_status_test.c53 const char *phase = NULL, *type = NULL, *desc = NULL; in self_test_events() local
63 phase = (const char *)p->data; in self_test_events()
75 if (strcmp(phase, OSSL_SELF_TEST_PHASE_START) == 0) in self_test_events()
77 else if (strcmp(phase, OSSL_SELF_TEST_PHASE_PASS) == 0 in self_test_events()
78 || strcmp(phase, OSSL_SELF_TEST_PHASE_FAIL) == 0) in self_test_events()
79 BIO_printf(bio_out, "%s\n", phase); in self_test_events()
84 if (corrupt && strcmp(phase, OSSL_SELF_TEST_PHASE_CORRUPT) == 0) in self_test_events()
/freebsd-14.2/sys/contrib/device-tree/Bindings/regulator/
H A Ddlg,da9121.yaml13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
19 Dialog Semiconductor DA9132 Double-channel 3A single-phase buck converter
20 Dialog Semiconductor DA9141 Single-channel 40A quad-phase buck converter
21 Dialog Semiconductor DA9142 Single-channel 20A double-phase buck converter
/freebsd-14.2/sys/contrib/device-tree/Bindings/iio/proximity/
H A Dsemtech,sx9324.yaml42 Value indicates how each CS pin is used during phase 0.
56 description: Same as ph0-pin for phase 1.
64 description: Same as ph0-pin for phase 2.
72 description: Same as ph0-pin for phase 3.
83 Capacitance measurement resolution. For phase 0 and 1.
91 Capacitance measurement resolution. For phase 2 and 3
100 It is used when we enable a phase to remove static offset and measure
109 PROXRAW filter strength for phase 0 and 1. A value of 0 represents off,
118 Same as proxraw-strength01, for phase 2 and 3.
/freebsd-14.2/sys/contrib/device-tree/Bindings/watchdog/
H A Drealtek,otto-wdt.yaml15 minimum duration of each phase is one tick. Each phase can trigger an
16 interrupt, although the phase 2 interrupt will occur with the system reset.
17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
18 - Phase 2: Starts after phase 1 has timed out, and only serves to give the
20 During this phase, pinging the WDT has no effect, and a reset is
/freebsd-14.2/contrib/wpa/hostapd/
H A Dhostapd.eap_user12 # [2] flag in the end of the line can be used to mark users for tunneled phase
14 # identity can be used in the unencrypted phase 1 and the real user identity
15 # is transmitted only within the encrypted tunnel in phase 2. If non-anonymous
16 # access is needed, two user entries is needed, one for phase 1 and another
17 # with the same username for phase 2.
26 # this are to set anonymous phase 1 identity for EAP-PEAP and EAP-TTLS and to
28 # first matching entry is selected, so * should be used as the last phase 1
34 # is only allowed for phase 1 identities.
94 # Default to EAP-SIM and EAP-AKA based on fixed identity prefixes in phase 2
/freebsd-14.2/sys/contrib/openzfs/include/os/freebsd/spl/sys/
H A Dsysmacros.h232 #define P2PHASEUP(x, align, phase) ((phase) - (((phase) - (x)) & -(align))) argument
271 #define P2PHASEUP_TYPED(x, align, phase, type) \ argument
272 ((type)(phase) - (((type)(phase) - (type)(x)) & -(type)(align)))
/freebsd-14.2/sys/contrib/device-tree/Bindings/timer/
H A Drenesas,rz-mtu3.yaml31 - Up to 12-phase PWM output in combination with synchronous operation
37 - 32-bit phase counting mode can be specified for interlocked operation
57 - 32-bit phase counting mode specifiable by combining MTU1 and MTU2 and
75 There are two phase counting modes. 16-bit phase counting mode in which
76 MTU1 and MTU2 operate independently, and cascade connection 32-bit phase
79 In phase counting mode, the phase difference between two external input
83 count0 - MTU1 16-bit phase counting
84 count1 - MTU2 16-bit phase counting
85 count2 - MTU1+ MTU2 32-bit phase counting
90 In complementary PWM mode, six positive-phase and six negative-phase PWM
/freebsd-14.2/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-peripheral-props.yaml19 description: Address timing, extend address phase with n cycles.
24 description: Setup chip select timing, extend setup phase with n cycles.
29 description: Strobe timing, extend strobe phase with n cycles.
34 description: Hold timing, extend hold phase with n cycles.
39 description: Recovery timing, extend recovery phase with n cycles.
/freebsd-14.2/sys/contrib/device-tree/Bindings/mfd/
H A Daxp20x.txt127 DCDC2 : DC-DC buck : vin2-supply : poly-phase capable
128 DCDC3 : DC-DC buck : vin3-supply : poly-phase capable
130 DCDC5 : DC-DC buck : vin5-supply : poly-phase capable
131 DCDC6 : DC-DC buck : vin6-supply : poly-phase capable
154 DCDCA : DC-DC buck : vina-supply : poly-phase capable
155 DCDCB : DC-DC buck : vinb-supply : poly-phase capable
156 DCDCC : DC-DC buck : vinc-supply : poly-phase capable
157 DCDCD : DC-DC buck : vind-supply : poly-phase capable
158 DCDCE : DC-DC buck : vine-supply : poly-phase capable
203 DCDC2 : DC-DC buck : vin2-supply : poly-phase capable
[all …]
/freebsd-14.2/contrib/libxo/xolint/
H A Dxolint.pl246 my $phase = 0;
269 $phase = 0;
271 } elsif ($phase == 0 && $ch eq ":") {
272 $phase += 1;
275 $phase += 1;
290 $build[$phase] .= $ch;
/freebsd-14.2/sys/contrib/device-tree/Bindings/sound/
H A Dmax98504.txt20 applied during the "attack hold" and "timed hold" phase, the value must be
22 - maxim,brownout-attack-hold-ms - the brownout attack hold phase time in ms,
24 - maxim,brownout-timed-hold-ms - the brownout timed hold phase time in ms,
26 - maxim,brownout-release-rate-ms - the brownout release phase step time in ms,
H A Dmaxim,max98504.yaml45 and "timed hold" phase, the value must be from 0...6 (dB) range.
51 Brownout attack hold phase time in ms, VBATBROWN_ATTK_HOLD, register 0x0018.
57 Brownout timed hold phase time in ms, VBATBROWN_TIME_HOLD, register 0x0019.
63 Brownout release phase step time in ms, VBATBROWN_RELEASE, register 0x001A.
/freebsd-14.2/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dsky81452-backlight.txt14 - skyworks,phase-shift : Enable phase shift mode
27 skyworks,phase-shift;
/freebsd-14.2/sys/contrib/device-tree/Bindings/power/supply/
H A Drohm,bd99954.yaml36 # First a constant current (5) phase (CC)
37 # Then constant voltage (CV) phase (after the battery voltage has reached
71 # Current used at trickle-charge phase (8 in above chart)
76 # Current used at pre-charge phase (6 in above chart)
81 # Current used at fast charge constant current phase (5 in above chart)
86 # The constant voltage used in fast charging phase (4 in above chart)

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