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Searched refs:mode_reg (Results 1 – 6 of 6) sorted by relevance

/freebsd-14.2/sys/arm64/rockchip/clk/
H A Drk_clk_pll.c45 uint32_t mode_reg; member
129 READ4(clk, sc->mode_reg, &reg); in rk3066_clk_pll_init()
151 WRITE4(clk, sc->mode_reg, reg); in rk3066_clk_pll_set_mux()
171 READ4(clk, sc->mode_reg, &reg); in rk3066_clk_pll_recalc()
232 WRITE4(clk, sc->mode_reg, reg); in rk3066_clk_pll_set_freq()
291 WRITE4(clk, sc->mode_reg, reg); in rk3066_clk_pll_set_freq()
328 sc->mode_reg = clkdef->mode_reg; in rk3066_clk_pll_register()
455 WRITE4(clk, sc->mode_reg, reg); in rk3328_clk_pll_set_freq()
494 WRITE4(clk, sc->mode_reg, reg); in rk3328_clk_pll_set_freq()
530 sc->mode_reg = clkdef->mode_reg; in rk3328_clk_pll_register()
H A Drk3328_cru.c677 .mode_reg = 0x80,
693 .mode_reg = 0x80,
706 .mode_reg = 0x80,
721 .mode_reg = 0x80,
737 .mode_reg = 0x80,
H A Drk_clk_pll.h51 uint32_t mode_reg; member
H A Drk3568_pmucru.c65 .mode_reg = 0x80, \
H A Drk3288_cru.c501 .mode_reg = CRU_MODE_CON, \
H A Drk3568_cru.c76 .mode_reg = 0xc0, \