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Searched refs:m_ZeroInt (Results 1 – 24 of 24) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp128 if (!match(TermI, m_Br(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()), in foldGuardedFunnelShift()
558 if (!match(GEP->idx_begin()->get(), m_ZeroInt())) in tryToRecognizeTableBasedCttz()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMIPatternMatch.h238 inline SpecificConstantMatch m_ZeroInt() { return SpecificConstantMatch(0); } in m_ZeroInt() function
767 return m_GSub(m_ZeroInt(), Src);
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DPatternMatch.h532 inline cst_pred_ty<is_zero_int> m_ZeroInt() { in m_ZeroInt() function
2137 if (AddExpr.match(ICmpLHS) && m_ZeroInt().match(ICmpRHS) && in match()
2142 if (m_ZeroInt().match(ICmpLHS) && AddExpr.match(ICmpRHS) && in match()
2425 return m_Sub(m_ZeroInt(), V);
2434 return m_NSWSub(m_ZeroInt(), V);
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp877 !match(Cmp1, m_ICmp(Pred1, m_Specific(X), m_ZeroInt()))) in foldIsPowerOf2OrZero()
902 if (JoinedByAnd && match(Cmp0, m_ICmp(Pred0, m_Value(X), m_ZeroInt())) && in foldIsPowerOf2()
910 if (!JoinedByAnd && match(Cmp0, m_ICmp(Pred0, m_Value(X), m_ZeroInt())) && in foldIsPowerOf2()
3248 PredL == PredR && match(LHS1, m_ZeroInt()) && match(RHS1, m_ZeroInt()) && in foldAndOrOfICmps()
3774 m_ZeroInt()), in visitOr()
H A DInstCombineAddSub.cpp1659 m_OneUse(m_ICmp(Pred, m_Specific(A), m_ZeroInt()))))) && in visitAdd()
2109 if (MinMax->isSigned() && match(Y, m_ZeroInt()) && in foldSubOfMinMax()
2196 bool IsNegation = match(Op0, m_ZeroInt()); in visitSub()
H A DInstCombineCasts.cpp959 if (Cmp->hasOneUse() && match(Cmp->getOperand(1), m_ZeroInt()) && in transformZExtICmp()
1266 if (Pred == ICmpInst::ICMP_SLT && match(Op1, m_ZeroInt())) { in transformSExtICmp()
H A DInstCombineCalls.cpp1986 if (match(Op1, m_ZeroInt()) || match(Op1, m_Undef())) in visitCallInst()
1991 if (match(Op0, m_ZeroInt()) || match(Op0, m_Undef())) in visitCallInst()
2660 if (match(KeyArg, m_ZeroInt()) && in visitCallInst()
H A DInstCombineVectorOps.cpp1298 if (!match(Op0, m_InsertElt(m_Undef(), m_Specific(X), m_ZeroInt()))) in foldInsEltIntoSplat()
2078 if (match(BO0, m_ZeroInt())) in getAlternateBinop()
H A DInstCombineSelect.cpp2344 if (!match(Cond, m_OneUse(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()))) || in foldSelectFunnelShift()
2801 if (!match(Cond, m_ICmp(Pred, m_Value(XLowBits), m_ZeroInt())) || in foldRoundUpIntegerWithPow2Alignment()
H A DInstCombineCompares.cpp5199 !match(Op1, m_ZeroInt())) in foldICmpPow2Test()
6773 (Pred == ICmpInst::ICMP_EQ && match(Op1, m_ZeroInt()) && in foldICmpOfUAddOv()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVectorCombine.cpp160 if (!match(&I, m_InsertElt(m_Undef(), m_Value(Scalar), m_ZeroInt())) || in vectorizeLoadInsert()
166 bool HasExtract = match(Scalar, m_ExtractElt(m_Value(X), m_ZeroInt())); in vectorizeLoadInsert()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp1743 !match(Cmp1, m_ICmp(Pred1, m_Specific(X), m_ZeroInt())) || C->isZero()) in simplifyAndOrOfICmpsWithCtpop()
4802 if (match(TrueVal, m_One()) && match(FalseVal, m_ZeroInt())) in simplifySelectInst()
4815 match(TrueVal, m_ZeroInt())) in simplifySelectInst()
4819 if (match(FalseVal, m_ZeroInt())) { in simplifySelectInst()
4868 if (match(FalseVal, m_ZeroInt())) in simplifySelectInst()
4879 if (match(TrueVal, m_ZeroInt())) in simplifySelectInst()
6194 if (match(Op1, PatternMatch::m_ZeroInt())) in simplifyLdexp()
H A DVectorUtils.cpp257 m_Shuffle(m_InsertElt(m_Value(), m_Value(Splat), m_ZeroInt()), in getSplatValue()
H A DValueTracking.cpp7628 if ((!NeedNSW && match(X, m_Sub(m_ZeroInt(), m_Specific(Y)))) || in isKnownNegation()
7629 (NeedNSW && match(X, m_NSWSub(m_ZeroInt(), m_Specific(Y))))) in isKnownNegation()
7633 if ((!NeedNSW && match(Y, m_Sub(m_ZeroInt(), m_Specific(X)))) || in isKnownNegation()
7634 (NeedNSW && match(Y, m_NSWSub(m_ZeroInt(), m_Specific(X))))) in isKnownNegation()
7779 auto ZeroOrAllOnes = m_CombineOr(m_ZeroInt(), m_AllOnes()); in matchSelectPattern()
7780 auto ZeroOrOne = m_CombineOr(m_ZeroInt(), m_One()); in matchSelectPattern()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp344 if (!mi_match(InsMI->getOperand(3).getReg(), MRI, m_ZeroInt())) in matchDupFromInsertVectorElt()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp1648 else if (Pred == ICmpInst::ICMP_NE && match(B, m_ZeroInt())) in matchUAddWithOverflowConstantEdgeCases()
1714 if (Pred == ICmpInst::ICMP_EQ && match(B, m_ZeroInt())) { in combineToUSubWithOverflow()
1719 if (Pred == ICmpInst::ICMP_NE && match(B, m_ZeroInt())) { in combineToUSubWithOverflow()
7192 if (!match(SVI, m_Shuffle(m_InsertElt(m_Undef(), m_Value(), m_ZeroInt()), in optimizeShuffleVectorInst()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp3344 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ZeroInt())) { in matchZeroExtendFromS32()
5308 if (STI.hasRestrictedSOffset() && mi_match(SOffset, *MRI, m_ZeroInt())) in selectBUFSOffset()
H A DAMDGPURegisterBankInfo.cpp1579 if (mi_match(Src2, MRI, m_ZeroInt())) in applyMappingMAD_64_32()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp545 if (match(CarryIn, PatternMatch::m_ZeroInt())) { in simplifyX86addcarry()
H A DX86ISelLowering.cpp30419 if (match(I, m_c_ICmp(Pred, m_Sub(m_ZeroInt(), m_Specific(Op)), m_Value()))) in shouldExpandCmpArithRMWInIR()
30422 if (match(I->user_back(), m_ICmp(Pred, m_Value(), m_ZeroInt()))) in shouldExpandCmpArithRMWInIR()
30433 if (match(I->user_back(), m_ICmp(Pred, m_Value(), m_ZeroInt()))) in shouldExpandCmpArithRMWInIR()
30444 if (match(I->user_back(), m_ICmp(Pred, m_Value(), m_ZeroInt()))) in shouldExpandCmpArithRMWInIR()
30455 if (match(I->user_back(), m_ICmp(Pred, m_Value(), m_ZeroInt()))) in shouldExpandCmpArithRMWInIR()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp849 if (match(V, m_Shuffle(m_InsertElt(m_Value(), m_Value(), m_ZeroInt()), in shouldSinkOperands()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp1423 if (match(II.getOperand(0), m_ZeroInt())) { in instCombineSVEAllOrNoActive()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2016 if (!match(Op, m_Shuffle(m_InsertElt(m_Undef(), m_Value(), m_ZeroInt()), in shouldSinkOperands()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp19363 m_InsertElt(m_Undef(), m_Value(), m_ZeroInt()), in shouldSinkOperands()